[media] rename most media/video usb drivers to media/usb

Rename all USB drivers with their own directory under
drivers/media/video into drivers/media/usb and update the
building system.

Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>

1 files changed, 0 insertions, 3087 deletions

diff --git a/drivers/media/video/cx231xx/cx231xx-avcore.c b/drivers/media/video/cx231xx/cx231xx-avcore.c
deleted file mode 100644
index 447148eff95..00000000000
--- a/drivers/media/video/cx231xx/cx231xx-avcore.c
+++ /dev/null
@@ -1,3087 +0,0 @@
-/*
-   cx231xx_avcore.c - driver for Conexant Cx23100/101/102
-		      USB video capture devices
-
-   Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
-
-   This program contains the specific code to control the avdecoder chip and
-   other related usb control functions for cx231xx based chipset.
-
-   This program is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 2 of the License, or
-   (at your option) any later version.
-
-   This program is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with this program; if not, write to the Free Software
-   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include <linux/init.h>
-#include <linux/list.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/bitmap.h>
-#include <linux/usb.h>
-#include <linux/i2c.h>
-#include <linux/mm.h>
-#include <linux/mutex.h>
-#include <media/tuner.h>
-
-#include <media/v4l2-common.h>
-#include <media/v4l2-ioctl.h>
-#include <media/v4l2-chip-ident.h>
-
-#include "cx231xx.h"
-#include "cx231xx-dif.h"
-
-#define TUNER_MODE_FM_RADIO 0
-/******************************************************************************
-			-: BLOCK ARRANGEMENT :-
-	I2S block ----------------------|
-	[I2S audio]			|
-					|
-	Analog Front End --> Direct IF -|-> Cx25840 --> Audio
-	[video & audio]			|   [Audio]
-					|
-					|-> Cx25840 --> Video
-					    [Video]
-
-*******************************************************************************/
-/******************************************************************************
- *                    VERVE REGISTER                                          *
- *									      *
- ******************************************************************************/
-static int verve_write_byte(struct cx231xx *dev, u8 saddr, u8 data)
-{
-	return cx231xx_write_i2c_data(dev, VERVE_I2C_ADDRESS,
-					saddr, 1, data, 1);
-}
-
-static int verve_read_byte(struct cx231xx *dev, u8 saddr, u8 *data)
-{
-	int status;
-	u32 temp = 0;
-
-	status = cx231xx_read_i2c_data(dev, VERVE_I2C_ADDRESS,
-					saddr, 1, &temp, 1);
-	*data = (u8) temp;
-	return status;
-}
-void initGPIO(struct cx231xx *dev)
-{
-	u32 _gpio_direction = 0;
-	u32 value = 0;
-	u8 val = 0;
-
-	_gpio_direction = _gpio_direction & 0xFC0003FF;
-	_gpio_direction = _gpio_direction | 0x03FDFC00;
-	cx231xx_send_gpio_cmd(dev, _gpio_direction, (u8 *)&value, 4, 0, 0);
-
-	verve_read_byte(dev, 0x07, &val);
-	cx231xx_info(" verve_read_byte address0x07=0x%x\n", val);
-	verve_write_byte(dev, 0x07, 0xF4);
-	verve_read_byte(dev, 0x07, &val);
-	cx231xx_info(" verve_read_byte address0x07=0x%x\n", val);
-
-	cx231xx_capture_start(dev, 1, Vbi);
-
-	cx231xx_mode_register(dev, EP_MODE_SET, 0x0500FE00);
-	cx231xx_mode_register(dev, GBULK_BIT_EN, 0xFFFDFFFF);
-
-}
-void uninitGPIO(struct cx231xx *dev)
-{
-	u8 value[4] = { 0, 0, 0, 0 };
-
-	cx231xx_capture_start(dev, 0, Vbi);
-	verve_write_byte(dev, 0x07, 0x14);
-	cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
-			0x68, value, 4);
-}
-
-/******************************************************************************
- *                    A F E - B L O C K    C O N T R O L   functions          *
- * 				[ANALOG FRONT END]			      *
- ******************************************************************************/
-static int afe_write_byte(struct cx231xx *dev, u16 saddr, u8 data)
-{
-	return cx231xx_write_i2c_data(dev, AFE_DEVICE_ADDRESS,
-					saddr, 2, data, 1);
-}
-
-static int afe_read_byte(struct cx231xx *dev, u16 saddr, u8 *data)
-{
-	int status;
-	u32 temp = 0;
-
-	status = cx231xx_read_i2c_data(dev, AFE_DEVICE_ADDRESS,
-					saddr, 2, &temp, 1);
-	*data = (u8) temp;
-	return status;
-}
-
-int cx231xx_afe_init_super_block(struct cx231xx *dev, u32 ref_count)
-{
-	int status = 0;
-	u8 temp = 0;
-	u8 afe_power_status = 0;
-	int i = 0;
-
-	/* super block initialize */
-	temp = (u8) (ref_count & 0xff);
-	status = afe_write_byte(dev, SUP_BLK_TUNE2, temp);
-	if (status < 0)
-		return status;
-
-	status = afe_read_byte(dev, SUP_BLK_TUNE2, &afe_power_status);
-	if (status < 0)
-		return status;
-
-	temp = (u8) ((ref_count & 0x300) >> 8);
-	temp |= 0x40;
-	status = afe_write_byte(dev, SUP_BLK_TUNE1, temp);
-	if (status < 0)
-		return status;
-
-	status = afe_write_byte(dev, SUP_BLK_PLL2, 0x0f);
-	if (status < 0)
-		return status;
-
-	/* enable pll     */
-	while (afe_power_status != 0x18) {
-		status = afe_write_byte(dev, SUP_BLK_PWRDN, 0x18);
-		if (status < 0) {
-			cx231xx_info(
-			": Init Super Block failed in send cmd\n");
-			break;
-		}
-
-		status = afe_read_byte(dev, SUP_BLK_PWRDN, &afe_power_status);
-		afe_power_status &= 0xff;
-		if (status < 0) {
-			cx231xx_info(
-			": Init Super Block failed in receive cmd\n");
-			break;
-		}
-		i++;
-		if (i == 10) {
-			cx231xx_info(
-			": Init Super Block force break in loop !!!!\n");
-			status = -1;
-			break;
-		}
-	}
-
-	if (status < 0)
-		return status;
-
-	/* start tuning filter */
-	status = afe_write_byte(dev, SUP_BLK_TUNE3, 0x40);
-	if (status < 0)
-		return status;
-
-	msleep(5);
-
-	/* exit tuning */
-	status = afe_write_byte(dev, SUP_BLK_TUNE3, 0x00);
-
-	return status;
-}
-
-int cx231xx_afe_init_channels(struct cx231xx *dev)
-{
-	int status = 0;
-
-	/* power up all 3 channels, clear pd_buffer */
-	status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1, 0x00);
-	status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2, 0x00);
-	status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, 0x00);
-
-	/* Enable quantizer calibration */
-	status = afe_write_byte(dev, ADC_COM_QUANT, 0x02);
-
-	/* channel initialize, force modulator (fb) reset */
-	status = afe_write_byte(dev, ADC_FB_FRCRST_CH1, 0x17);
-	status = afe_write_byte(dev, ADC_FB_FRCRST_CH2, 0x17);
-	status = afe_write_byte(dev, ADC_FB_FRCRST_CH3, 0x17);
-
-	/* start quantilizer calibration  */
-	status = afe_write_byte(dev, ADC_CAL_ATEST_CH1, 0x10);
-	status = afe_write_byte(dev, ADC_CAL_ATEST_CH2, 0x10);
-	status = afe_write_byte(dev, ADC_CAL_ATEST_CH3, 0x10);
-	msleep(5);
-
-	/* exit modulator (fb) reset */
-	status = afe_write_byte(dev, ADC_FB_FRCRST_CH1, 0x07);
-	status = afe_write_byte(dev, ADC_FB_FRCRST_CH2, 0x07);
-	status = afe_write_byte(dev, ADC_FB_FRCRST_CH3, 0x07);
-
-	/* enable the pre_clamp in each channel for single-ended input */
-	status = afe_write_byte(dev, ADC_NTF_PRECLMP_EN_CH1, 0xf0);
-	status = afe_write_byte(dev, ADC_NTF_PRECLMP_EN_CH2, 0xf0);
-	status = afe_write_byte(dev, ADC_NTF_PRECLMP_EN_CH3, 0xf0);
-
-	/* use diode instead of resistor, so set term_en to 0, res_en to 0  */
-	status = cx231xx_reg_mask_write(dev, AFE_DEVICE_ADDRESS, 8,
-				   ADC_QGAIN_RES_TRM_CH1, 3, 7, 0x00);
-	status = cx231xx_reg_mask_write(dev, AFE_DEVICE_ADDRESS, 8,
-				   ADC_QGAIN_RES_TRM_CH2, 3, 7, 0x00);
-	status = cx231xx_reg_mask_write(dev, AFE_DEVICE_ADDRESS, 8,
-				   ADC_QGAIN_RES_TRM_CH3, 3, 7, 0x00);
-
-	/* dynamic element matching off */
-	status = afe_write_byte(dev, ADC_DCSERVO_DEM_CH1, 0x03);
-	status = afe_write_byte(dev, ADC_DCSERVO_DEM_CH2, 0x03);
-	status = afe_write_byte(dev, ADC_DCSERVO_DEM_CH3, 0x03);
-
-	return status;
-}
-
-int cx231xx_afe_setup_AFE_for_baseband(struct cx231xx *dev)
-{
-	u8 c_value = 0;
-	int status = 0;
-
-	status = afe_read_byte(dev, ADC_PWRDN_CLAMP_CH2, &c_value);
-	c_value &= (~(0x50));
-	status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2, c_value);
-
-	return status;
-}
-
-/*
-	The Analog Front End in Cx231xx has 3 channels. These
-	channels are used to share between different inputs
-	like tuner, s-video and composite inputs.
-
-	channel 1 ----- pin 1  to pin4(in reg is 1-4)
-	channel 2 ----- pin 5  to pin8(in reg is 5-8)
-	channel 3 ----- pin 9 to pin 12(in reg is 9-11)
-*/
-int cx231xx_afe_set_input_mux(struct cx231xx *dev, u32 input_mux)
-{
-	u8 ch1_setting = (u8) input_mux;
-	u8 ch2_setting = (u8) (input_mux >> 8);
-	u8 ch3_setting = (u8) (input_mux >> 16);
-	int status = 0;
-	u8 value = 0;
-
-	if (ch1_setting != 0) {
-		status = afe_read_byte(dev, ADC_INPUT_CH1, &value);
-		value &= ~INPUT_SEL_MASK;
-		value |= (ch1_setting - 1) << 4;
-		value &= 0xff;
-		status = afe_write_byte(dev, ADC_INPUT_CH1, value);
-	}
-
-	if (ch2_setting != 0) {
-		status = afe_read_byte(dev, ADC_INPUT_CH2, &value);
-		value &= ~INPUT_SEL_MASK;
-		value |= (ch2_setting - 1) << 4;
-		value &= 0xff;
-		status = afe_write_byte(dev, ADC_INPUT_CH2, value);
-	}
-
-	/* For ch3_setting, the value to put in the register is
-	   7 less than the input number */
-	if (ch3_setting != 0) {
-		status = afe_read_byte(dev, ADC_INPUT_CH3, &value);
-		value &= ~INPUT_SEL_MASK;
-		value |= (ch3_setting - 1) << 4;
-		value &= 0xff;
-		status = afe_write_byte(dev, ADC_INPUT_CH3, value);
-	}
-
-	return status;
-}
-
-int cx231xx_afe_set_mode(struct cx231xx *dev, enum AFE_MODE mode)
-{
-	int status = 0;
-
-	/*
-	* FIXME: We need to implement the AFE code for LOW IF and for HI IF.
-	* Currently, only baseband works.
-	*/
-
-	switch (mode) {
-	case AFE_MODE_LOW_IF:
-		cx231xx_Setup_AFE_for_LowIF(dev);
-		break;
-	case AFE_MODE_BASEBAND:
-		status = cx231xx_afe_setup_AFE_for_baseband(dev);
-		break;
-	case AFE_MODE_EU_HI_IF:
-		/* SetupAFEforEuHiIF(); */
-		break;
-	case AFE_MODE_US_HI_IF:
-		/* SetupAFEforUsHiIF(); */
-		break;
-	case AFE_MODE_JAPAN_HI_IF:
-		/* SetupAFEforJapanHiIF(); */
-		break;
-	}
-
-	if ((mode != dev->afe_mode) &&
-		(dev->video_input == CX231XX_VMUX_TELEVISION))
-		status = cx231xx_afe_adjust_ref_count(dev,
-						     CX231XX_VMUX_TELEVISION);
-
-	dev->afe_mode = mode;
-
-	return status;
-}
-
-int cx231xx_afe_update_power_control(struct cx231xx *dev,
-					enum AV_MODE avmode)
-{
-	u8 afe_power_status = 0;
-	int status = 0;
-
-	switch (dev->model) {
-	case CX231XX_BOARD_CNXT_CARRAERA:
-	case CX231XX_BOARD_CNXT_RDE_250:
-	case CX231XX_BOARD_CNXT_SHELBY:
-	case CX231XX_BOARD_CNXT_RDU_250:
-	case CX231XX_BOARD_CNXT_RDE_253S:
-	case CX231XX_BOARD_CNXT_RDU_253S:
-	case CX231XX_BOARD_CNXT_VIDEO_GRABBER:
-	case CX231XX_BOARD_HAUPPAUGE_EXETER:
-	case CX231XX_BOARD_HAUPPAUGE_USBLIVE2:
-	case CX231XX_BOARD_PV_PLAYTV_USB_HYBRID:
-	case CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL:
-	case CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC:
-		if (avmode == POLARIS_AVMODE_ANALOGT_TV) {
-			while (afe_power_status != (FLD_PWRDN_TUNING_BIAS |
-						FLD_PWRDN_ENABLE_PLL)) {
-				status = afe_write_byte(dev, SUP_BLK_PWRDN,
-							FLD_PWRDN_TUNING_BIAS |
-							FLD_PWRDN_ENABLE_PLL);
-				status |= afe_read_byte(dev, SUP_BLK_PWRDN,
-							&afe_power_status);
-				if (status < 0)
-					break;
-			}
-
-			status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1,
-							0x00);
-			status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2,
-							0x00);
-			status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3,
-							0x00);
-		} else if (avmode == POLARIS_AVMODE_DIGITAL) {
-			status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1,
-							0x70);
-			status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2,
-							0x70);
-			status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3,
-							0x70);
-
-			status |= afe_read_byte(dev, SUP_BLK_PWRDN,
-						  &afe_power_status);
-			afe_power_status |= FLD_PWRDN_PD_BANDGAP |
-						FLD_PWRDN_PD_BIAS |
-						FLD_PWRDN_PD_TUNECK;
-			status |= afe_write_byte(dev, SUP_BLK_PWRDN,
-						   afe_power_status);
-		} else if (avmode == POLARIS_AVMODE_ENXTERNAL_AV) {
-			while (afe_power_status != (FLD_PWRDN_TUNING_BIAS |
-						FLD_PWRDN_ENABLE_PLL)) {
-				status = afe_write_byte(dev, SUP_BLK_PWRDN,
-							FLD_PWRDN_TUNING_BIAS |
-							FLD_PWRDN_ENABLE_PLL);
-				status |= afe_read_byte(dev, SUP_BLK_PWRDN,
-							&afe_power_status);
-				if (status < 0)
-					break;
-			}
-
-			status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1,
-						0x00);
-			status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2,
-						0x00);
-			status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3,
-						0x00);
-		} else {
-			cx231xx_info("Invalid AV mode input\n");
-			status = -1;
-		}
-		break;
-	default:
-		if (avmode == POLARIS_AVMODE_ANALOGT_TV) {
-			while (afe_power_status != (FLD_PWRDN_TUNING_BIAS |
-						FLD_PWRDN_ENABLE_PLL)) {
-				status = afe_write_byte(dev, SUP_BLK_PWRDN,
-							FLD_PWRDN_TUNING_BIAS |
-							FLD_PWRDN_ENABLE_PLL);
-				status |= afe_read_byte(dev, SUP_BLK_PWRDN,
-							&afe_power_status);
-				if (status < 0)
-					break;
-			}
-
-			status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1,
-							0x40);
-			status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2,
-							0x40);
-			status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3,
-							0x00);
-		} else if (avmode == POLARIS_AVMODE_DIGITAL) {
-			status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1,
-							0x70);
-			status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2,
-							0x70);
-			status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3,
-							0x70);
-
-			status |= afe_read_byte(dev, SUP_BLK_PWRDN,
-						       &afe_power_status);
-			afe_power_status |= FLD_PWRDN_PD_BANDGAP |
-						FLD_PWRDN_PD_BIAS |
-						FLD_PWRDN_PD_TUNECK;
-			status |= afe_write_byte(dev, SUP_BLK_PWRDN,
-							afe_power_status);
-		} else if (avmode == POLARIS_AVMODE_ENXTERNAL_AV) {
-			while (afe_power_status != (FLD_PWRDN_TUNING_BIAS |
-						FLD_PWRDN_ENABLE_PLL)) {
-				status = afe_write_byte(dev, SUP_BLK_PWRDN,
-							FLD_PWRDN_TUNING_BIAS |
-							FLD_PWRDN_ENABLE_PLL);
-				status |= afe_read_byte(dev, SUP_BLK_PWRDN,
-							&afe_power_status);
-				if (status < 0)
-					break;
-			}
-
-			status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1,
-							0x00);
-			status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2,
-							0x00);
-			status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3,
-							0x40);
-		} else {
-			cx231xx_info("Invalid AV mode input\n");
-			status = -1;
-		}
-	}			/* switch  */
-
-	return status;
-}
-
-int cx231xx_afe_adjust_ref_count(struct cx231xx *dev, u32 video_input)
-{
-	u8 input_mode = 0;
-	u8 ntf_mode = 0;
-	int status = 0;
-
-	dev->video_input = video_input;
-
-	if (video_input == CX231XX_VMUX_TELEVISION) {
-		status = afe_read_byte(dev, ADC_INPUT_CH3, &input_mode);
-		status = afe_read_byte(dev, ADC_NTF_PRECLMP_EN_CH3,
-					&ntf_mode);
-	} else {
-		status = afe_read_byte(dev, ADC_INPUT_CH1, &input_mode);
-		status = afe_read_byte(dev, ADC_NTF_PRECLMP_EN_CH1,
-					&ntf_mode);
-	}
-
-	input_mode = (ntf_mode & 0x3) | ((input_mode & 0x6) << 1);
-
-	switch (input_mode) {
-	case SINGLE_ENDED:
-		dev->afe_ref_count = 0x23C;
-		break;
-	case LOW_IF:
-		dev->afe_ref_count = 0x24C;
-		break;
-	case EU_IF:
-		dev->afe_ref_count = 0x258;
-		break;
-	case US_IF:
-		dev->afe_ref_count = 0x260;
-		break;
-	default:
-		break;
-	}
-
-	status = cx231xx_afe_init_super_block(dev, dev->afe_ref_count);
-
-	return status;
-}
-
-/******************************************************************************
- *     V I D E O / A U D I O    D E C O D E R    C O N T R O L   functions    *
- ******************************************************************************/
-static int vid_blk_write_byte(struct cx231xx *dev, u16 saddr, u8 data)
-{
-	return cx231xx_write_i2c_data(dev, VID_BLK_I2C_ADDRESS,
-					saddr, 2, data, 1);
-}
-
-static int vid_blk_read_byte(struct cx231xx *dev, u16 saddr, u8 *data)
-{
-	int status;
-	u32 temp = 0;
-
-	status = cx231xx_read_i2c_data(dev, VID_BLK_I2C_ADDRESS,
-					saddr, 2, &temp, 1);
-	*data = (u8) temp;
-	return status;
-}
-
-static int vid_blk_write_word(struct cx231xx *dev, u16 saddr, u32 data)
-{
-	return cx231xx_write_i2c_data(dev, VID_BLK_I2C_ADDRESS,
-					saddr, 2, data, 4);
-}
-
-static int vid_blk_read_word(struct cx231xx *dev, u16 saddr, u32 *data)
-{
-	return cx231xx_read_i2c_data(dev, VID_BLK_I2C_ADDRESS,
-					saddr, 2, data, 4);
-}
-int cx231xx_check_fw(struct cx231xx *dev)
-{
-	u8 temp = 0;
-	int status = 0;
-	status = vid_blk_read_byte(dev, DL_CTL_ADDRESS_LOW, &temp);
-	if (status < 0)
-		return status;
-	else
-		return temp;
-
-}
-
-int cx231xx_set_video_input_mux(struct cx231xx *dev, u8 input)
-{
-	int status = 0;
-
-	switch (INPUT(input)->type) {
-	case CX231XX_VMUX_COMPOSITE1:
-	case CX231XX_VMUX_SVIDEO:
-		if ((dev->current_pcb_config.type == USB_BUS_POWER) &&
-		    (dev->power_mode != POLARIS_AVMODE_ENXTERNAL_AV)) {
-			/* External AV */
-			status = cx231xx_set_power_mode(dev,
-					POLARIS_AVMODE_ENXTERNAL_AV);
-			if (status < 0) {
-				cx231xx_errdev("%s: set_power_mode : Failed to"
-						" set Power - errCode [%d]!\n",
-						__func__, status);
-				return status;
-			}
-		}
-		status = cx231xx_set_decoder_video_input(dev,
-							 INPUT(input)->type,
-							 INPUT(input)->vmux);
-		break;
-	case CX231XX_VMUX_TELEVISION:
-	case CX231XX_VMUX_CABLE:
-		if ((dev->current_pcb_config.type == USB_BUS_POWER) &&
-		    (dev->power_mode != POLARIS_AVMODE_ANALOGT_TV)) {
-			/* Tuner */
-			status = cx231xx_set_power_mode(dev,
-						POLARIS_AVMODE_ANALOGT_TV);
-			if (status < 0) {
-				cx231xx_errdev("%s: set_power_mode:Failed"
-					" to set Power - errCode [%d]!\n",
-					__func__, status);
-				return status;
-			}
-		}
-		if (dev->tuner_type == TUNER_NXP_TDA18271)
-			status = cx231xx_set_decoder_video_input(dev,
-							CX231XX_VMUX_TELEVISION,
-							INPUT(input)->vmux);
-		else
-			status = cx231xx_set_decoder_video_input(dev,
-							CX231XX_VMUX_COMPOSITE1,
-							INPUT(input)->vmux);
-
-		break;
-	default:
-		cx231xx_errdev("%s: set_power_mode : Unknown Input %d !\n",
-		     __func__, INPUT(input)->type);
-		break;
-	}
-
-	/* save the selection */
-	dev->video_input = input;
-
-	return status;
-}
-
-int cx231xx_set_decoder_video_input(struct cx231xx *dev,
-				u8 pin_type, u8 input)
-{
-	int status = 0;
-	u32 value = 0;
-
-	if (pin_type != dev->video_input) {
-		status = cx231xx_afe_adjust_ref_count(dev, pin_type);
-		if (status < 0) {
-			cx231xx_errdev("%s: adjust_ref_count :Failed to set"
-				"AFE input mux - errCode [%d]!\n",
-				__func__, status);
-			return status;
-		}
-	}
-
-	/* call afe block to set video inputs */
-	status = cx231xx_afe_set_input_mux(dev, input);
-	if (status < 0) {
-		cx231xx_errdev("%s: set_input_mux :Failed to set"
-				" AFE input mux - errCode [%d]!\n",
-				__func__, status);
-		return status;
-	}
-
-	switch (pin_type) {
-	case CX231XX_VMUX_COMPOSITE1:
-		status = vid_blk_read_word(dev, AFE_CTRL, &value);
-		value |= (0 << 13) | (1 << 4);
-		value &= ~(1 << 5);
-
-		/* set [24:23] [22:15] to 0  */
-		value &= (~(0x1ff8000));
-		/* set FUNC_MODE[24:23] = 2 IF_MOD[22:15] = 0  */
-		value |= 0x1000000;
-		status = vid_blk_write_word(dev, AFE_CTRL, value);
-
-		status = vid_blk_read_word(dev, OUT_CTRL1, &value);
-		value |= (1 << 7);
-		status = vid_blk_write_word(dev, OUT_CTRL1, value);
-
-		/* Set output mode */
-		status = cx231xx_read_modify_write_i2c_dword(dev,
-							VID_BLK_I2C_ADDRESS,
-							OUT_CTRL1,
-							FLD_OUT_MODE,
-							dev->board.output_mode);
-
-		/* Tell DIF object to go to baseband mode  */
-		status = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND);
-		if (status < 0) {
-			cx231xx_errdev("%s: cx231xx_dif set to By pass"
-						   " mode- errCode [%d]!\n",
-				__func__, status);
-			return status;
-		}
-
-		/* Read the DFE_CTRL1 register */
-		status = vid_blk_read_word(dev, DFE_CTRL1, &value);
-
-		/* enable the VBI_GATE_EN */
-		value |= FLD_VBI_GATE_EN;
-
-		/* Enable the auto-VGA enable */
-		value |= FLD_VGA_AUTO_EN;
-
-		/* Write it back */
-		status = vid_blk_write_word(dev, DFE_CTRL1, value);
-
-		/* Disable auto config of registers */
-		status = cx231xx_read_modify_write_i2c_dword(dev,
-					VID_BLK_I2C_ADDRESS,
-					MODE_CTRL, FLD_ACFG_DIS,
-					cx231xx_set_field(FLD_ACFG_DIS, 1));
-
-		/* Set CVBS input mode */
-		status = cx231xx_read_modify_write_i2c_dword(dev,
-			VID_BLK_I2C_ADDRESS,
-			MODE_CTRL, FLD_INPUT_MODE,
-			cx231xx_set_field(FLD_INPUT_MODE, INPUT_MODE_CVBS_0));
-		break;
-	case CX231XX_VMUX_SVIDEO:
-		/* Disable the use of  DIF */
-
-		status = vid_blk_read_word(dev, AFE_CTRL, &value);
-
-		/* set [24:23] [22:15] to 0 */
-		value &= (~(0x1ff8000));
-		/* set FUNC_MODE[24:23] = 2
-		IF_MOD[22:15] = 0 DCR_BYP_CH2[4:4] = 1; */
-		value |= 0x1000010;
-		status = vid_blk_write_word(dev, AFE_CTRL, value);
-
-		/* Tell DIF object to go to baseband mode */
-		status = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND);
-		if (status < 0) {
-			cx231xx_errdev("%s: cx231xx_dif set to By pass"
-						   " mode- errCode [%d]!\n",
-				__func__, status);
-			return status;
-		}
-
-		/* Read the DFE_CTRL1 register */
-		status = vid_blk_read_word(dev, DFE_CTRL1, &value);
-
-		/* enable the VBI_GATE_EN */
-		value |= FLD_VBI_GATE_EN;
-
-		/* Enable the auto-VGA enable */
-		value |= FLD_VGA_AUTO_EN;
-
-		/* Write it back */
-		status = vid_blk_write_word(dev, DFE_CTRL1, value);
-
-		/* Disable auto config of registers  */
-		status =  cx231xx_read_modify_write_i2c_dword(dev,
-					VID_BLK_I2C_ADDRESS,
-					MODE_CTRL, FLD_ACFG_DIS,
-					cx231xx_set_field(FLD_ACFG_DIS, 1));
-
-		/* Set YC input mode */
-		status = cx231xx_read_modify_write_i2c_dword(dev,
-			VID_BLK_I2C_ADDRESS,
-			MODE_CTRL,
-			FLD_INPUT_MODE,
-			cx231xx_set_field(FLD_INPUT_MODE, INPUT_MODE_YC_1));
-
-		/* Chroma to ADC2 */
-		status = vid_blk_read_word(dev, AFE_CTRL, &value);
-		value |= FLD_CHROMA_IN_SEL;	/* set the chroma in select */
-
-		/* Clear VGA_SEL_CH2 and VGA_SEL_CH3 (bits 7 and 8)
-		   This sets them to use video
-		   rather than audio.  Only one of the two will be in use. */
-		value &= ~(FLD_VGA_SEL_CH2 | FLD_VGA_SEL_CH3);
-
-		status = vid_blk_write_word(dev, AFE_CTRL, value);
-
-		status = cx231xx_afe_set_mode(dev, AFE_MODE_BASEBAND);
-		break;
-	case CX231XX_VMUX_TELEVISION:
-	case CX231XX_VMUX_CABLE:
-	default:
-		/* TODO: Test if this is also needed for xc2028/xc3028 */
-		if (dev->board.tuner_type == TUNER_XC5000) {
-			/* Disable the use of  DIF   */
-
-			status = vid_blk_read_word(dev, AFE_CTRL, &value);
-			value |= (0 << 13) | (1 << 4);
-			value &= ~(1 << 5);
-
-			/* set [24:23] [22:15] to 0 */
-			value &= (~(0x1FF8000));
-			/* set FUNC_MODE[24:23] = 2 IF_MOD[22:15] = 0 */
-			value |= 0x1000000;
-			status = vid_blk_write_word(dev, AFE_CTRL, value);
-
-			status = vid_blk_read_word(dev, OUT_CTRL1, &value);
-			value |= (1 << 7);
-			status = vid_blk_write_word(dev, OUT_CTRL1, value);
-
-			/* Set output mode */
-			status = cx231xx_read_modify_write_i2c_dword(dev,
-							VID_BLK_I2C_ADDRESS,
-							OUT_CTRL1, FLD_OUT_MODE,
-							dev->board.output_mode);
-
-			/* Tell DIF object to go to baseband mode */
-			status = cx231xx_dif_set_standard(dev,
-							  DIF_USE_BASEBAND);
-			if (status < 0) {
-				cx231xx_errdev("%s: cx231xx_dif set to By pass"
-						" mode- errCode [%d]!\n",
-						__func__, status);
-				return status;
-			}
-
-			/* Read the DFE_CTRL1 register */
-			status = vid_blk_read_word(dev, DFE_CTRL1, &value);
-
-			/* enable the VBI_GATE_EN */
-			value |= FLD_VBI_GATE_EN;
-
-			/* Enable the auto-VGA enable */
-			value |= FLD_VGA_AUTO_EN;
-
-			/* Write it back */
-			status = vid_blk_write_word(dev, DFE_CTRL1, value);
-
-			/* Disable auto config of registers */
-			status = cx231xx_read_modify_write_i2c_dword(dev,
-					VID_BLK_I2C_ADDRESS,
-					MODE_CTRL, FLD_ACFG_DIS,
-					cx231xx_set_field(FLD_ACFG_DIS, 1));
-
-			/* Set CVBS input mode */
-			status = cx231xx_read_modify_write_i2c_dword(dev,
-				VID_BLK_I2C_ADDRESS,
-				MODE_CTRL, FLD_INPUT_MODE,
-				cx231xx_set_field(FLD_INPUT_MODE,
-						INPUT_MODE_CVBS_0));
-		} else {
-			/* Enable the DIF for the tuner */
-
-			/* Reinitialize the DIF */
-			status = cx231xx_dif_set_standard(dev, dev->norm);
-			if (status < 0) {
-				cx231xx_errdev("%s: cx231xx_dif set to By pass"
-						" mode- errCode [%d]!\n",
-						__func__, status);
-				return status;
-			}
-
-			/* Make sure bypass is cleared */
-			status = vid_blk_read_word(dev, DIF_MISC_CTRL, &value);
-
-			/* Clear the bypass bit */
-			value &= ~FLD_DIF_DIF_BYPASS;
-
-			/* Enable the use of the DIF block */
-			status = vid_blk_write_word(dev, DIF_MISC_CTRL, value);
-
-			/* Read the DFE_CTRL1 register */
-			status = vid_blk_read_word(dev, DFE_CTRL1, &value);
-
-			/* Disable the VBI_GATE_EN */
-			value &= ~FLD_VBI_GATE_EN;
-
-			/* Enable the auto-VGA enable, AGC, and
-			   set the skip count to 2 */
-			value |= FLD_VGA_AUTO_EN | FLD_AGC_AUTO_EN | 0x00200000;
-
-			/* Write it back */
-			status = vid_blk_write_word(dev, DFE_CTRL1, value);
-
-			/* Wait until AGC locks up */
-			msleep(1);
-
-			/* Disable the auto-VGA enable AGC */
-			value &= ~(FLD_VGA_AUTO_EN);
-
-			/* Write it back */
-			status = vid_blk_write_word(dev, DFE_CTRL1, value);
-
-			/* Enable Polaris B0 AGC output */
-			status = vid_blk_read_word(dev, PIN_CTRL, &value);
-			value |= (FLD_OEF_AGC_RF) |
-				 (FLD_OEF_AGC_IFVGA) |
-				 (FLD_OEF_AGC_IF);
-			status = vid_blk_write_word(dev, PIN_CTRL, value);
-
-			/* Set output mode */
-			status = cx231xx_read_modify_write_i2c_dword(dev,
-						VID_BLK_I2C_ADDRESS,
-						OUT_CTRL1, FLD_OUT_MODE,
-						dev->board.output_mode);
-
-			/* Disable auto config of registers */
-			status = cx231xx_read_modify_write_i2c_dword(dev,
-					VID_BLK_I2C_ADDRESS,
-					MODE_CTRL, FLD_ACFG_DIS,
-					cx231xx_set_field(FLD_ACFG_DIS, 1));
-
-			/* Set CVBS input mode */
-			status = cx231xx_read_modify_write_i2c_dword(dev,
-				VID_BLK_I2C_ADDRESS,
-				MODE_CTRL, FLD_INPUT_MODE,
-				cx231xx_set_field(FLD_INPUT_MODE,
-						INPUT_MODE_CVBS_0));
-
-			/* Set some bits in AFE_CTRL so that channel 2 or 3
-			 * is ready to receive audio */
-			/* Clear clamp for channels 2 and 3      (bit 16-17) */
-			/* Clear droop comp                      (bit 19-20) */
-			/* Set VGA_SEL (for audio control)       (bit 7-8) */
-			status = vid_blk_read_word(dev, AFE_CTRL, &value);
-
-			/*Set Func mode:01-DIF 10-baseband 11-YUV*/
-			value &= (~(FLD_FUNC_MODE));
-			value |= 0x800000;
-
-			value |= FLD_VGA_SEL_CH3 | FLD_VGA_SEL_CH2;
-
-			status = vid_blk_write_word(dev, AFE_CTRL, value);
-
-			if (dev->tuner_type == TUNER_NXP_TDA18271) {
-				status = vid_blk_read_word(dev, PIN_CTRL,
-				 &value);
-				status = vid_blk_write_word(dev, PIN_CTRL,
-				 (value & 0xFFFFFFEF));
-			}
-
-			break;
-
-		}
-		break;
-	}
-
-	/* Set raw VBI mode */
-	status = cx231xx_read_modify_write_i2c_dword(dev,
-				VID_BLK_I2C_ADDRESS,
-				OUT_CTRL1, FLD_VBIHACTRAW_EN,
-				cx231xx_set_field(FLD_VBIHACTRAW_EN, 1));
-
-	status = vid_blk_read_word(dev, OUT_CTRL1, &value);
-	if (value & 0x02) {
-		value |= (1 << 19);
-		status = vid_blk_write_word(dev, OUT_CTRL1, value);
-	}
-
-	return status;
-}
-
-void cx231xx_enable656(struct cx231xx *dev)
-{
-	u8 temp = 0;
-	/*enable TS1 data[0:7] as output to export 656*/
-
-	vid_blk_write_byte(dev, TS1_PIN_CTL0, 0xFF);
-
-	/*enable TS1 clock as output to export 656*/
-
-	vid_blk_read_byte(dev, TS1_PIN_CTL1, &temp);
-	temp = temp|0x04;
-
-	vid_blk_write_byte(dev, TS1_PIN_CTL1, temp);
-}
-EXPORT_SYMBOL_GPL(cx231xx_enable656);
-
-void cx231xx_disable656(struct cx231xx *dev)
-{
-	u8 temp = 0;
-
-	vid_blk_write_byte(dev, TS1_PIN_CTL0, 0x00);
-
-	vid_blk_read_byte(dev, TS1_PIN_CTL1, &temp);
-	temp = temp&0xFB;
-
-	vid_blk_write_byte(dev, TS1_PIN_CTL1, temp);
-}
-EXPORT_SYMBOL_GPL(cx231xx_disable656);
-
-/*
- * Handle any video-mode specific overrides that are different
- * on a per video standards basis after touching the MODE_CTRL
- * register which resets many values for autodetect
- */
-int cx231xx_do_mode_ctrl_overrides(struct cx231xx *dev)
-{
-	int status = 0;
-
-	cx231xx_info("do_mode_ctrl_overrides : 0x%x\n",
-		     (unsigned int)dev->norm);
-
-	/* Change the DFE_CTRL3 bp_percent to fix flagging */
-	status = vid_blk_write_word(dev, DFE_CTRL3, 0xCD3F0280);
-
-	if (dev->norm & (V4L2_STD_NTSC | V4L2_STD_PAL_M)) {
-		cx231xx_info("do_mode_ctrl_overrides NTSC\n");
-
-		/* Move the close caption lines out of active video,
-		   adjust the active video start point */
-		status = cx231xx_read_modify_write_i2c_dword(dev,
-							VID_BLK_I2C_ADDRESS,
-							VERT_TIM_CTRL,
-							FLD_VBLANK_CNT, 0x18);
-		status = cx231xx_read_modify_write_i2c_dword(dev,
-							VID_BLK_I2C_ADDRESS,
-							VERT_TIM_CTRL,
-							FLD_VACTIVE_CNT,
-							0x1E7000);
-		status = cx231xx_read_modify_write_i2c_dword(dev,
-							VID_BLK_I2C_ADDRESS,
-							VERT_TIM_CTRL,
-							FLD_V656BLANK_CNT,
-							0x1C000000);
-
-		status = cx231xx_read_modify_write_i2c_dword(dev,
-							VID_BLK_I2C_ADDRESS,
-							HORIZ_TIM_CTRL,
-							FLD_HBLANK_CNT,
-							cx231xx_set_field
-							(FLD_HBLANK_CNT, 0x79));
-
-	} else if (dev->norm & V4L2_STD_SECAM) {
-		cx231xx_info("do_mode_ctrl_overrides SECAM\n");
-		status =  cx231xx_read_modify_write_i2c_dword(dev,
-							VID_BLK_I2C_ADDRESS,
-							VERT_TIM_CTRL,
-							FLD_VBLANK_CNT, 0x20);
-		status = cx231xx_read_modify_write_i2c_dword(dev,
-							VID_BLK_I2C_ADDRESS,
-							VERT_TIM_CTRL,
-							FLD_VACTIVE_CNT,
-							cx231xx_set_field
-							(FLD_VACTIVE_CNT,
-							 0x244));
-		status = cx231xx_read_modify_write_i2c_dword(dev,
-							VID_BLK_I2C_ADDRESS,
-							VERT_TIM_CTRL,
-							FLD_V656BLANK_CNT,
-							cx231xx_set_field
-							(FLD_V656BLANK_CNT,
-							0x24));
-		/* Adjust the active video horizontal start point */
-		status = cx231xx_read_modify_write_i2c_dword(dev,
-							VID_BLK_I2C_ADDRESS,
-							HORIZ_TIM_CTRL,
-							FLD_HBLANK_CNT,
-							cx231xx_set_field
-							(FLD_HBLANK_CNT, 0x85));
-	} else {
-		cx231xx_info("do_mode_ctrl_overrides PAL\n");
-		status = cx231xx_read_modify_write_i2c_dword(dev,
-							VID_BLK_I2C_ADDRESS,
-							VERT_TIM_CTRL,
-							FLD_VBLANK_CNT, 0x20);
-		status = cx231xx_read_modify_write_i2c_dword(dev,
-							VID_BLK_I2C_ADDRESS,
-							VERT_TIM_CTRL,
-							FLD_VACTIVE_CNT,
-							cx231xx_set_field
-							(FLD_VACTIVE_CNT,
-							 0x244));
-		status = cx231xx_read_modify_write_i2c_dword(dev,
-							VID_BLK_I2C_ADDRESS,
-							VERT_TIM_CTRL,
-							FLD_V656BLANK_CNT,
-							cx231xx_set_field
-							(FLD_V656BLANK_CNT,
-							0x24));
-		/* Adjust the active video horizontal start point */
-		status = cx231xx_read_modify_write_i2c_dword(dev,
-							VID_BLK_I2C_ADDRESS,
-							HORIZ_TIM_CTRL,
-							FLD_HBLANK_CNT,
-							cx231xx_set_field
-							(FLD_HBLANK_CNT, 0x85));
-
-	}
-
-	return status;
-}
-
-int cx231xx_unmute_audio(struct cx231xx *dev)
-{
-	return vid_blk_write_byte(dev, PATH1_VOL_CTL, 0x24);
-}
-EXPORT_SYMBOL_GPL(cx231xx_unmute_audio);
-
-int stopAudioFirmware(struct cx231xx *dev)
-{
-	return vid_blk_write_byte(dev, DL_CTL_CONTROL, 0x03);
-}
-
-int restartAudioFirmware(struct cx231xx *dev)
-{
-	return vid_blk_write_byte(dev, DL_CTL_CONTROL, 0x13);
-}
-
-int cx231xx_set_audio_input(struct cx231xx *dev, u8 input)
-{
-	int status = 0;
-	enum AUDIO_INPUT ainput = AUDIO_INPUT_LINE;
-
-	switch (INPUT(input)->amux) {
-	case CX231XX_AMUX_VIDEO:
-		ainput = AUDIO_INPUT_TUNER_TV;
-		break;
-	case CX231XX_AMUX_LINE_IN:
-		status = cx231xx_i2s_blk_set_audio_input(dev, input);
-		ainput = AUDIO_INPUT_LINE;
-		break;
-	default:
-		break;
-	}
-
-	status = cx231xx_set_audio_decoder_input(dev, ainput);
-
-	return status;
-}
-
-int cx231xx_set_audio_decoder_input(struct cx231xx *dev,
-				    enum AUDIO_INPUT audio_input)
-{
-	u32 dwval;
-	int status;
-	u8 gen_ctrl;
-	u32 value = 0;
-
-	/* Put it in soft reset   */
-	status = vid_blk_read_byte(dev, GENERAL_CTL, &gen_ctrl);
-	gen_ctrl |= 1;
-	status = vid_blk_write_byte(dev, GENERAL_CTL, gen_ctrl);
-
-	switch (audio_input) {
-	case AUDIO_INPUT_LINE:
-		/* setup AUD_IO control from Merlin paralle output */
-		value = cx231xx_set_field(FLD_AUD_CHAN1_SRC,
-					  AUD_CHAN_SRC_PARALLEL);
-		status = vid_blk_write_word(dev, AUD_IO_CTRL, value);
-
-		/* setup input to Merlin, SRC2 connect to AC97
-		   bypass upsample-by-2, slave mode, sony mode, left justify
-		   adr 091c, dat 01000000 */
-		status = vid_blk_read_word(dev, AC97_CTL, &dwval);
-
-		status = vid_b