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authorLen Brown <len.brown@intel.com>2011-01-12 02:51:20 -0500
committerLen Brown <len.brown@intel.com>2011-01-12 12:47:33 -0500
commit956d033fb2eb3f8818260cdf01644bf4dc1a9e33 (patch)
tree261030e0e523010c13084abcd5df9d78fe5e7326 /drivers/idle
parent642f11c53f17aee991d97d14e6922172849ef227 (diff)
cpuidle: CPUIDLE_FLAG_TLB_FLUSHED is specific to intel_idle
Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'drivers/idle')
-rw-r--r--drivers/idle/intel_idle.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c
index 21d387132db..8256309deaa 100644
--- a/drivers/idle/intel_idle.c
+++ b/drivers/idle/intel_idle.c
@@ -82,6 +82,14 @@ static int intel_idle(struct cpuidle_device *dev, struct cpuidle_state *state);
static struct cpuidle_state *cpuidle_state_table;
/*
+ * Set this flag for states where the HW flushes the TLB for us
+ * and so we don't need cross-calls to keep it consistent.
+ * If this flag is set, SW flushes the TLB, so even if the
+ * HW doesn't do the flushing, this flag is safe to use.
+ */
+#define CPUIDLE_FLAG_TLB_FLUSHED 0x10000
+
+/*
* States are indexed by the cstate number,
* which is also the index into the MWAIT hint array.
* Thus C0 is a dummy.