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authorAlistair John Strachan <alistair@devzero.co.uk>2009-07-11 13:42:38 +0200
committerJean Delvare <khali@linux-fr.org>2009-07-11 13:42:38 +0200
commitec05a8d75d0777cd221f61a88437a31e4cfb83d8 (patch)
tree741dfd2a8960b141a469bdf3ae5557b73ecc602a /drivers/hwmon/abituguru3.c
parent24205e0850dd8a79c597e366daafdd5f31a24656 (diff)
hwmon: (abituguru3) DMI probing for AB9, AB9 QuadQT and IX38 QuadGT
Switch the AB9, AB9 QuadQT and IX38 QuadGT over from port probing to the preferred DMI probe method. Signed-off-by: Alistair John Strachan <alistair@devzero.co.uk> Tested-by: dan <dan@deeog.com> Tested-by: Nygel Lyndley <nygel.lyndley@gmail.com> Tested-by: Dmitriy Fedchenko <dmitriy-fedc@yandex.ru> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
Diffstat (limited to 'drivers/hwmon/abituguru3.c')
-rw-r--r--drivers/hwmon/abituguru3.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/hwmon/abituguru3.c b/drivers/hwmon/abituguru3.c
index ad2b3431b72..7d3f15d32fd 100644
--- a/drivers/hwmon/abituguru3.c
+++ b/drivers/hwmon/abituguru3.c
@@ -357,7 +357,7 @@ static const struct abituguru3_motherboard_info abituguru3_motherboards[] = {
{ "AUX5 Fan", 39, 2, 60, 1, 0 },
{ NULL, 0, 0, 0, 0, 0 } }
},
- { 0x0014, NULL /* Abit AB9 Pro, need DMI string */, {
+ { 0x0014, "AB9", /* + AB9 Pro */ {
{ "CPU Core", 0, 0, 10, 1, 0 },
{ "DDR", 1, 0, 10, 1, 0 },
{ "DDR VTT", 2, 0, 10, 1, 0 },
@@ -455,7 +455,7 @@ static const struct abituguru3_motherboard_info abituguru3_motherboards[] = {
{ "AUX3 FAN", 37, 2, 60, 1, 0 },
{ NULL, 0, 0, 0, 0, 0 } }
},
- { 0x0018, NULL /* Unknown, need DMI string */, {
+ { 0x0018, "AB9 QuadGT", {
{ "CPU Core", 0, 0, 10, 1, 0 },
{ "DDR2", 1, 0, 20, 1, 0 },
{ "DDR2 VTT", 2, 0, 10, 1, 0 },
@@ -564,7 +564,7 @@ static const struct abituguru3_motherboard_info abituguru3_motherboards[] = {
{ "AUX3 Fan", 36, 2, 60, 1, 0 },
{ NULL, 0, 0, 0, 0, 0 } }
},
- { 0x001C, NULL /* Unknown, need DMI string */, {
+ { 0x001C, "IX38 QuadGT", {
{ "CPU Core", 0, 0, 10, 1, 0 },
{ "DDR2", 1, 0, 20, 1, 0 },
{ "DDR2 VTT", 2, 0, 10, 1, 0 },