diff options
| author | Christian König <deathsimple@vodafone.de> | 2012-10-22 17:42:39 +0200 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2012-10-23 10:23:51 -0400 |
| commit | 08eda32b13c045b6219464764d6028d86d3c58a8 (patch) | |
| tree | e7cc8c2b56d9280af5f71c9105ec84d07bc3b120 /drivers/gpu | |
| parent | 204a393c5b88106d7485e20ec834add1013e410a (diff) | |
drm/radeon: fix header size estimation in VM code
Only NI uses 3dw headers, SI uses 4dw headers.
Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_gart.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_gart.c b/drivers/gpu/drm/radeon/radeon_gart.c index 926dc9db644..e9e8953e74a 100644 --- a/drivers/gpu/drm/radeon/radeon_gart.c +++ b/drivers/gpu/drm/radeon/radeon_gart.c @@ -1147,17 +1147,17 @@ int radeon_vm_bo_update_pte(struct radeon_device *rdev, if (RADEON_VM_BLOCK_SIZE > 11) /* reserve space for one header for every 2k dwords */ - ndw += (nptes >> 11) * 3; + ndw += (nptes >> 11) * 4; else /* reserve space for one header for every (1 << BLOCK_SIZE) entries */ - ndw += (nptes >> RADEON_VM_BLOCK_SIZE) * 3; + ndw += (nptes >> RADEON_VM_BLOCK_SIZE) * 4; /* reserve space for pte addresses */ ndw += nptes * 2; /* reserve space for one header for every 2k dwords */ - ndw += (npdes >> 11) * 3; + ndw += (npdes >> 11) * 4; /* reserve space for pde addresses */ ndw += npdes * 2; |