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| author | Dave Airlie <airlied@redhat.com> | 2010-08-02 10:24:46 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2010-08-02 10:24:46 +1000 |
| commit | 7827627107aeb629f1a056cb56b17bd4fb789e03 (patch) | |
| tree | cbd83582abb9120c7ef724bf439916c8bf864e37 /drivers/gpu/drm/radeon/rv770.c | |
| parent | e190bfe56841551b1ad5abb42ebd0c4798cc8c01 (diff) | |
| parent | 219de62a1627247fca10789f28902f66cb0b408f (diff) | |
Merge branch 'drm-radeon-next' of ../drm-radeon-next into drm-core-next
* 'drm-radeon-next' of ../drm-radeon-next: (333 commits)
drm/radeon/kms: trivial code style fixes for audio
drm/radeon: remove viewport transform from r6xx/r7xx blit emit
drm/radeon: group r6xx/r7xx newly sequential blit state
drm/radeon: reorder r6xx/r7xx blit state emit to make more regs sequential
drm/radeon: r6xx/r7xx move vport clipping to a single packet
drm/radeon: group r6xx/r7xx sequential blit state
drm/radeon: remove duplicate state emit in r6xx/r7xx blit
drm/radeon: add comments to r6xx/r7xx blit state
drm/radeon/kms/r7xx: add workaround for hw issue with HDP flush
drm/radeon/kms: remove rs4xx gart limit
drm: radeon: fix sign bug
drm/radeon/kms: check/restore sanity before doing anything else with GPU.
drm/radeon: fall back to GTT if bo creation/validation in VRAM fails.
drm/radeon/kms: add ioport register access
drm/radeon/kms: enable HDMI audio on RS600/RS690/RS740
drm/radeon/kms: track audio engine state, do not use not setup timer
drm/radeon/kms/r6xx+: add query for tile config (v2)
drm/radeon/kms: fix CS alignment checking for tiling (v2)
drm/radeon/kms: add tiling support to the cs checker for r6xx/r7xx
drm/radeon/kms: Add crtc tiling setup support for evergreen
...
Diffstat (limited to 'drivers/gpu/drm/radeon/rv770.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/rv770.c | 23 |
1 files changed, 21 insertions, 2 deletions
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c index 6a7bf109197..f1c79681011 100644 --- a/drivers/gpu/drm/radeon/rv770.c +++ b/drivers/gpu/drm/radeon/rv770.c @@ -42,6 +42,21 @@ static void rv770_gpu_init(struct radeon_device *rdev); void rv770_fini(struct radeon_device *rdev); +/* get temperature in millidegrees */ +u32 rv770_get_temp(struct radeon_device *rdev) +{ + u32 temp = (RREG32(CG_MULT_THERMAL_STATUS) & ASIC_T_MASK) >> + ASIC_T_SHIFT; + u32 actual_temp = 0; + + if ((temp >> 9) & 1) + actual_temp = 0; + else + actual_temp = (temp >> 1) & 0xff; + + return actual_temp * 1000; +} + void rv770_pm_misc(struct radeon_device *rdev) { int req_ps_idx = rdev->pm.requested_power_state_index; @@ -189,7 +204,10 @@ static void rv770_mc_program(struct radeon_device *rdev) WREG32((0x2c20 + j), 0x00000000); WREG32((0x2c24 + j), 0x00000000); } - WREG32(HDP_REG_COHERENCY_FLUSH_CNTL, 0); + /* r7xx hw bug. Read from HDP_DEBUG1 rather + * than writing to HDP_REG_COHERENCY_FLUSH_CNTL + */ + tmp = RREG32(HDP_DEBUG1); rv515_mc_stop(rdev, &save); if (r600_mc_wait_for_idle(rdev)) { @@ -659,8 +677,9 @@ static void rv770_gpu_init(struct radeon_device *rdev) r600_count_pipe_bits((cc_rb_backend_disable & R7XX_MAX_BACKENDS_MASK) >> 16)), (cc_rb_backend_disable >> 16)); - gb_tiling_config |= BACKEND_MAP(backend_map); + rdev->config.rv770.tile_config = gb_tiling_config; + gb_tiling_config |= BACKEND_MAP(backend_map); WREG32(GB_TILING_CONFIG, gb_tiling_config); WREG32(DCP_TILING_CONFIG, (gb_tiling_config & 0xffff)); |