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authorAlex Deucher <alexander.deucher@amd.com>2013-08-19 11:06:50 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-10-01 08:55:47 -0700
commitea0f1f563576a598112cd64308ddb461379d85a9 (patch)
tree0d1d04fb6f9e965368f75af53068972eabe9d57b /drivers/gpu/drm/radeon/evergreend.h
parent3df0155c467f982d4c06078b74d042d7a5c2a743 (diff)
drm/radeon: update line buffer allocation for dce4.1/5
commit 0b31e02363b0db4e7931561bc6c141436e729d9f upstream. We need to allocate line buffer to each display when setting up the watermarks. Failure to do so can lead to a blank screen. This fixes blank screen problems on dce4.1/5 asics. Based on an initial fix from: Jay Cornwall <jay.cornwall@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/gpu/drm/radeon/evergreend.h')
-rw-r--r--drivers/gpu/drm/radeon/evergreend.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h
index 6078ae4cc16..ab670c3d3c2 100644
--- a/drivers/gpu/drm/radeon/evergreend.h
+++ b/drivers/gpu/drm/radeon/evergreend.h
@@ -450,6 +450,10 @@
# define LATENCY_LOW_WATERMARK(x) ((x) << 0)
# define LATENCY_HIGH_WATERMARK(x) ((x) << 16)
+#define PIPE0_DMIF_BUFFER_CONTROL 0x0ca0
+# define DMIF_BUFFERS_ALLOCATED(x) ((x) << 0)
+# define DMIF_BUFFERS_ALLOCATED_COMPLETED (1 << 4)
+
#define IH_RB_CNTL 0x3e00
# define IH_RB_ENABLE (1 << 0)
# define IH_IB_SIZE(x) ((x) << 1) /* log2 */