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authorDave Airlie <airlied@redhat.com>2010-11-18 14:57:28 +1000
committerDave Airlie <airlied@redhat.com>2010-11-18 14:57:28 +1000
commit9a03d3487abe89e3650bb2533c5d909143955499 (patch)
tree5f7632fc11fb72492d8a217a850ddd43e24299f4 /drivers/gpu/drm/nouveau/nouveau_sgdma.c
parent1aa52bd3bc839064d5a3e4de406850f4a3aa5378 (diff)
parentab838338a2a9e0cb8346eb0cab9977be13e8dce5 (diff)
Merge remote branch 'nouveau/for-airlied' of /ssd/git/drm-nouveau-next into drm-fixes
* 'nouveau/for-airlied' of /ssd/git/drm-nouveau-next: (25 commits) nouveau: Acknowledge HPD irq in handler, not bottom half drm/nouveau: Fix a few confusions between "chipset" and "card_type". drm/nouveau: don't expose backlight control when available through ACPI drm/nouveau/pm: improve memtiming mappings drm/nouveau: Make PCIE GART size depend on the available RAMIN space. drm/nouveau: Return error from nouveau_gpuobj_new if we're out of RAMIN. drm/nouveau: Fix compilation issues in nouveau_pm when CONFIG_HWMON is not set drm/nouveau: Don't use load detection for connector polling. drm/nv10-nv20: Fix instability after MPLL changes. drm/nv50: implement possible workaround for NV86 PGRAPH TLB flush hang drm/nouveau: Don't poll LVDS outputs. drm/nouveau: Use "force" to decide if analog load detection is ok or not. drm/nv04: Fix scanout over the 16MB mark. drm/nouveau: fix nv40 pcie gart size drm/nva3: fix overflow in fixed point math used for pll calculation drm/nv10: Balance RTs expected to be accessed simultaneously by the 3d engine. drm/nouveau: Expose some BO usage flags to userspace. drm/nouveau: Reduce severity of the unknown getparam error. drm/nouveau: Avoid lock dependency between ramht and ramin spinlocks. drm/nouveau: Some random cleanups. ...
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_sgdma.c')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_sgdma.c14
1 files changed, 9 insertions, 5 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_sgdma.c b/drivers/gpu/drm/nouveau/nouveau_sgdma.c
index 288bacac7e5..d4ac9700703 100644
--- a/drivers/gpu/drm/nouveau/nouveau_sgdma.c
+++ b/drivers/gpu/drm/nouveau/nouveau_sgdma.c
@@ -120,8 +120,8 @@ nouveau_sgdma_bind(struct ttm_backend *be, struct ttm_mem_reg *mem)
dev_priv->engine.instmem.flush(nvbe->dev);
if (dev_priv->card_type == NV_50) {
- nv50_vm_flush(dev, 5); /* PGRAPH */
- nv50_vm_flush(dev, 0); /* PFIFO */
+ dev_priv->engine.fifo.tlb_flush(dev);
+ dev_priv->engine.graph.tlb_flush(dev);
}
nvbe->bound = true;
@@ -162,8 +162,8 @@ nouveau_sgdma_unbind(struct ttm_backend *be)
dev_priv->engine.instmem.flush(nvbe->dev);
if (dev_priv->card_type == NV_50) {
- nv50_vm_flush(dev, 5);
- nv50_vm_flush(dev, 0);
+ dev_priv->engine.fifo.tlb_flush(dev);
+ dev_priv->engine.graph.tlb_flush(dev);
}
nvbe->bound = false;
@@ -224,7 +224,11 @@ nouveau_sgdma_init(struct drm_device *dev)
int i, ret;
if (dev_priv->card_type < NV_50) {
- aper_size = (64 * 1024 * 1024);
+ if(dev_priv->ramin_rsvd_vram < 2 * 1024 * 1024)
+ aper_size = 64 * 1024 * 1024;
+ else
+ aper_size = 512 * 1024 * 1024;
+
obj_size = (aper_size >> NV_CTXDMA_PAGE_SHIFT) * 4;
obj_size += 8; /* ctxdma header */
} else {