diff options
| author | Shobhit Kumar <shobhit.kumar@intel.com> | 2012-06-15 11:55:14 -0700 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-06-20 14:51:38 +0200 |
| commit | 98364379e1d967b8a070070797498c3708e73eb7 (patch) | |
| tree | 32411014028f4b63854ededa441e7a81a8f5c733 /drivers/gpu/drm/i915/intel_crt.c | |
| parent | a0c4da24eafb32a3ce44f37b7c3412c6ffb6e37c (diff) | |
drm/i915: Enable DP panel power sequencing for ValleyView
VLV supports two dp panels, there are two set of panel power sequence
registers which needed to be programmed based on the configured
pipe. This patch add supports for the same
Acked-by: Acked-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Beeresh G <beeresh.g@intel.com>
Reviewed-by: Vijay Purushothaman <vijay.a.purushothaman@intel.com>
Reviewed-by: Jesse Barnes <jesse.barnes@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
[danvet: Drop the lone hunk and only keep the register definitions - I
loathe incomplete bandaids. Also add a comment that this is for vlv.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_crt.c')
0 files changed, 0 insertions, 0 deletions