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authorJesse Barnes <jbarnes@virtuousgeek.org>2012-02-27 12:40:10 -0800
committerKeith Packard <keithp@keithp.com>2012-03-07 10:49:28 -0800
commitab2f9df10dd955f1fc0a8650e377588c98f1c029 (patch)
treef57cfa46082264de55d172e4ce026b94d3399837 /drivers/gpu/drm/i915/i915_reg.h
parent91982b58d35720b75b894c60e1e3133daa455b53 (diff)
drm/i915: fix color order for BGR formats on SNB
Had the wrong bits and field definitions. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 03c53fcf865..558ac716a32 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2689,7 +2689,7 @@
#define DVS_FORMAT_RGBX888 (2<<25)
#define DVS_FORMAT_RGBX161616 (3<<25)
#define DVS_SOURCE_KEY (1<<22)
-#define DVS_RGB_ORDER_RGBX (1<<20)
+#define DVS_RGB_ORDER_XBGR (1<<20)
#define DVS_YUV_BYTE_ORDER_MASK (3<<16)
#define DVS_YUV_ORDER_YUYV (0<<16)
#define DVS_YUV_ORDER_UYVY (1<<16)