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authorKenneth Graunke <kenneth@whitecape.org>2012-02-08 12:53:52 -0800
committerJesse Barnes <jbarnes@virtuousgeek.org>2012-02-10 14:19:17 -0800
commitd71de14ddf423ccc9a2e3f7e37553c99ead20d7c (patch)
tree407abe86ecdda635a5b60ac8826472316343c5dd /drivers/gpu/drm/i915/i915_reg.h
parentdb099c8f963fe656108e0a068274c5580a17f69b (diff)
drm/i915: gen7: Disable the RHWO optimization as it can cause GPU hangs.
The BSpec Workarounds page states that bits 10 and 26 must be set to avoid 3D ring hangs. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41353 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44610 Tested-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 4e1ee909a80..03c53fcf865 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3029,6 +3029,9 @@
#define DISP_FBC_WM_DIS (1<<15)
/* GEN7 chicken */
+#define GEN7_COMMON_SLICE_CHICKEN1 0x7010
+# define GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC ((1<<10) | (1<<26))
+
#define GEN7_L3CNTLREG1 0xB01C
#define GEN7_WA_FOR_GEN7_L3_CONTROL 0x3C4FFF8C