diff options
| author | Chris Wilson <chris@chris-wilson.co.uk> | 2011-05-12 22:17:09 +0100 |
|---|---|---|
| committer | Keith Packard <keithp@keithp.com> | 2011-07-13 11:28:07 -0700 |
| commit | 95736720fc866eadb2ce1789631b907c0f38cb7c (patch) | |
| tree | 5071fe60b3cdd5951e351e1565121287aa17675a /drivers/gpu/drm/i915/i915_reg.h | |
| parent | f5a3d0c4086d1854cbda545092c462b84cba20ce (diff) | |
drm/i915: Cache GT fifo count for SandyBridge
The read back of the available FIFO entries is vital for system
stability, but extremely costly. However, we only need a guide so as to
avoid eating into the reserved entries and since we are the only
consumer we can cache the read of the count from the last write.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 96fb0fa47c4..02db299f621 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -3361,6 +3361,7 @@ #define FORCEWAKE_ACK 0x130090 #define GT_FIFO_FREE_ENTRIES 0x120008 +#define GT_FIFO_NUM_RESERVED_ENTRIES 20 #define GEN6_RPNSWREQ 0xA008 #define GEN6_TURBO_DISABLE (1<<31) |