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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2010-10-03 10:56:11 +0100 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2010-10-03 10:56:11 +0100 |
| commit | 58e10eb92d36a62568349d985c9140d9be16a99c (patch) | |
| tree | 6ffaf65e64db390f6a28c1dca8c43d4eb1493f94 /drivers/gpu/drm/i915/i915_reg.h | |
| parent | 1cdf7fef793c715d8c4998575aba3741fa4a0b01 (diff) | |
| parent | ab7ad7f6451580aa7eccc0ba62807c872088a8f9 (diff) | |
Merge branch 'drm-intel-fixes' into drm-intel-next
Conflicts:
drivers/gpu/drm/i915/i915_gem_evict.c
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_dp.c
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 58cfea25a64..d02de212e6a 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -2105,7 +2105,7 @@ /* Pipe A */ #define PIPEADSL 0x70000 -#define DSL_LINEMASK 0x00000fff +#define DSL_LINEMASK 0x00000fff #define PIPEACONF 0x70008 #define PIPECONF_ENABLE (1<<31) #define PIPECONF_DISABLE 0 @@ -2162,13 +2162,14 @@ #define PIPE_START_VBLANK_INTERRUPT_STATUS (1UL<<2) /* 965 or later */ #define PIPE_VBLANK_INTERRUPT_STATUS (1UL<<1) #define PIPE_OVERLAY_UPDATED_STATUS (1UL<<0) -#define PIPE_BPC_MASK (7 << 5) /* Ironlake */ +#define PIPE_BPC_MASK (7 << 5) /* Ironlake */ #define PIPE_8BPC (0 << 5) #define PIPE_10BPC (1 << 5) #define PIPE_6BPC (2 << 5) #define PIPE_12BPC (3 << 5) #define PIPECONF(pipe) _PIPE(pipe, PIPEACONF, PIPEBCONF) +#define PIPEDSL(pipe) _PIPE(pipe, PIPEADSL, PIPEBDSL) #define DSPARB 0x70030 #define DSPARB_CSTART_MASK (0x7f << 7) |