diff options
author | Jesse Barnes <jbarnes@virtuousgeek.org> | 2011-05-11 09:49:31 -0700 |
---|---|---|
committer | Keith Packard <keithp@keithp.com> | 2011-05-13 18:12:53 -0700 |
commit | 645c62a5e95a5f9a8e0d0627446bbda4ee042024 (patch) | |
tree | 5c1872335ce9bfe99a78bc69bf3490dcf8fc0f60 /drivers/gpu/drm/i915/i915_reg.h | |
parent | 28963a3eb5e2ae861995c2f7c15c7de982b3ce0e (diff) |
drm/i915: split PCH clock gating init
Ibex Peak and CougarPoint already require a different setting (added
here), and future chips will likely follow that precedent.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 160903adf70..2f967af8e62 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -3074,6 +3074,9 @@ #define TRANS_6BPC (2<<5) #define TRANS_12BPC (3<<5) +#define SOUTH_CHICKEN2 0xc2004 +#define DPLS_EDP_PPS_FIX_DIS (1<<0) + #define _FDI_RXA_CHICKEN 0xc200c #define _FDI_RXB_CHICKEN 0xc2010 #define FDI_RX_PHASE_SYNC_POINTER_OVR (1<<1) |