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authorRussell King <rmk+kernel@arm.linux.org.uk>2012-05-16 11:08:43 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2012-07-01 14:15:45 +0100
commit409ec8db46dc60e5da7169b6bac6b294513d386a (patch)
tree8db0c43d5ca25147721ba11b7bc1c8c091e5d6be /drivers/dma
parent95442b223405dae313e3e273765cc1c905d67717 (diff)
dmaengine: PL08x: move the bus and increment selection to dma prepare function
Move the bus and transfer increment selection to the DMA prepare function rather than the slave configuration function. Acked-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'drivers/dma')
-rw-r--r--drivers/dma/amba-pl08x.c26
1 files changed, 14 insertions, 12 deletions
diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c
index 7eb0e8ef6a5..bd51a44746b 100644
--- a/drivers/dma/amba-pl08x.c
+++ b/drivers/dma/amba-pl08x.c
@@ -1258,13 +1258,9 @@ static int dma_set_runtime_config(struct dma_chan *chan,
cctl |= burst << PL080_CONTROL_DB_SIZE_SHIFT;
if (plchan->runtime_direction == DMA_DEV_TO_MEM) {
- plchan->src_cctl = pl08x_cctl(cctl) | PL080_CONTROL_DST_INCR |
- pl08x_select_bus(plchan->cd->periph_buses,
- pl08x->mem_buses);
+ plchan->src_cctl = pl08x_cctl(cctl);
} else {
- plchan->dst_cctl = pl08x_cctl(cctl) | PL080_CONTROL_SRC_INCR |
- pl08x_select_bus(pl08x->mem_buses,
- plchan->cd->periph_buses);
+ plchan->dst_cctl = pl08x_cctl(cctl);
}
dev_dbg(&pl08x->adev->dev,
@@ -1451,6 +1447,8 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
struct scatterlist *sg;
dma_addr_t slave_addr;
int ret, tmp;
+ u8 src_buses, dst_buses;
+ u32 cctl;
dev_dbg(&pl08x->adev->dev, "%s prepare transaction of %d bytes from %s\n",
__func__, sg_dma_len(sgl), plchan->name);
@@ -1474,11 +1472,15 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
txd->direction = direction;
if (direction == DMA_MEM_TO_DEV) {
- txd->cctl = plchan->dst_cctl;
+ cctl = plchan->dst_cctl | PL080_CONTROL_SRC_INCR;
slave_addr = plchan->cfg.dst_addr;
+ src_buses = pl08x->mem_buses;
+ dst_buses = plchan->cd->periph_buses;
} else if (direction == DMA_DEV_TO_MEM) {
- txd->cctl = plchan->src_cctl;
+ cctl = plchan->src_cctl | PL080_CONTROL_DST_INCR;
slave_addr = plchan->cfg.src_addr;
+ src_buses = plchan->cd->periph_buses;
+ dst_buses = pl08x->mem_buses;
} else {
pl08x_free_txd(pl08x, txd);
dev_err(&pl08x->adev->dev,
@@ -1486,6 +1488,8 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
return NULL;
}
+ txd->cctl = cctl | pl08x_select_bus(src_buses, dst_buses);
+
if (plchan->cfg.device_fc)
tmp = (direction == DMA_MEM_TO_DEV) ? PL080_FLOW_MEM2PER_PER :
PL080_FLOW_PER2MEM_PER;
@@ -1785,10 +1789,8 @@ static void pl08x_dma_slave_init(struct pl08x_dma_chan *chan)
chan->name = chan->cd->bus_id;
chan->cfg.src_addr = chan->cd->addr;
chan->cfg.dst_addr = chan->cd->addr;
- chan->src_cctl = cctl | PL080_CONTROL_DST_INCR |
- pl08x_select_bus(chan->cd->periph_buses, chan->host->mem_buses);
- chan->dst_cctl = cctl | PL080_CONTROL_SRC_INCR |
- pl08x_select_bus(chan->host->mem_buses, chan->cd->periph_buses);
+ chan->src_cctl = cctl;
+ chan->dst_cctl = cctl;
}
/*