diff options
| author | Viresh Kumar <viresh.kumar@st.com> | 2011-08-05 15:32:34 +0530 |
|---|---|---|
| committer | Vinod Koul <vinod.koul@intel.com> | 2011-08-25 19:33:38 +0530 |
| commit | 48a59ef3579492855d41405f8bf0a2983e061976 (patch) | |
| tree | 71f73aef26d74054dee11dcbeebdcd7a0ced57d7 /drivers/dma | |
| parent | b7b6018bad6fd7ebe5a78bda5f2a71a6ecf5406a (diff) | |
dmaengine/amba-pl08x: Simplify pl08x_ensure_on()
Simply writing 1 on bit 0 is sufficient instead of reading and clearing bits.
Also as per manual, for bit 3-31 of DMACConfiguration register:
"read undefined, write as 0"
So, we must not rely on values read from this registers bit 3-31.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma')
| -rw-r--r-- | drivers/dma/amba-pl08x.c | 8 |
1 files changed, 1 insertions, 7 deletions
diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c index 5dd97f45092..d79688d6488 100644 --- a/drivers/dma/amba-pl08x.c +++ b/drivers/dma/amba-pl08x.c @@ -1502,13 +1502,7 @@ bool pl08x_filter_id(struct dma_chan *chan, void *chan_id) */ static void pl08x_ensure_on(struct pl08x_driver_data *pl08x) { - u32 val; - - val = readl(pl08x->base + PL080_CONFIG); - val &= ~(PL080_CONFIG_M2_BE | PL080_CONFIG_M1_BE | PL080_CONFIG_ENABLE); - /* We implicitly clear bit 1 and that means little-endian mode */ - val |= PL080_CONFIG_ENABLE; - writel(val, pl08x->base + PL080_CONFIG); + writel(PL080_CONFIG_ENABLE, pl08x->base + PL080_CONFIG); } static void pl08x_unmap_buffers(struct pl08x_txd *txd) |