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authorAlex Deucher <alexander.deucher@amd.com>2012-08-22 09:54:56 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2012-10-02 10:39:43 -0700
commit76a271deba25e001c25a5e24420838506858e426 (patch)
treebe230ee9bdcd73698c5aaa0dcf3944fef75272b4 /drivers/clocksource
parentdf6a5ea44759e88b7c025704cd9cb6a6e64188a4 (diff)
drm/radeon/atom: rework DIG modesetting on DCE3+
commit 8d1af57ae3c4458ed0de93ef97f388dd1b3239c7 upstream. The ordering is important and the current drm code wasn't cutting it for modern DIG encoders. We need to have information about crtc before setting up the encoders so I've shifted the ordering a bit. Probably we'll need a full rework akin to danvet's recent intel patchs. This patch fixes numerous issues with DP bridge chips and makes link training much more reliable. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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