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authorLinus Torvalds <torvalds@linux-foundation.org>2012-07-24 16:40:57 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2012-07-24 16:40:57 -0700
commit9161c3b796a2841a9a7be3d9c9dd121269ce90e8 (patch)
tree4920a191c4a2eecae1a4e055af7e967f1e769714 /drivers/clk/clk-fixed-rate.c
parent97027da6adf2e24a4e8d3d9c0668da3006b29971 (diff)
parent137f8a7213d80c1388ca48280c1ef0856b6fec30 (diff)
Merge tag 'clk-for-linus' of git://git.linaro.org/people/mturquette/linux
Pull common clk framework changes from Michael Turquette: "This includes a small number of core framework improvments, platform ports and new DT bindings." Fix up trivial conflicts in drivers/clk/Makefile * tag 'clk-for-linus' of git://git.linaro.org/people/mturquette/linux: (21 commits) clk: fix compile for OF && !COMMON_CLK clk: fix clk_get on of_clk_get_by_name return check clk: mxs: clk_register_clkdev mx28 usb clocks clk: add highbank clock support dt: add clock binding doc to primecell bindings clk: add DT fixed-clock binding support clk: add DT clock binding support ARM: integrator: convert to common clock clk: add versatile ICST307 driver ARM: integrator: put symbolic bus names on devices ARM: u300: convert to common clock clk: cache parent clocks only for muxes clk: wm831x: Add initial WM831x clock driver clk: Constify struct clk_init_data clk: Add CLK_IS_BASIC flag to identify basic clocks clk: Add support for rate table based dividers clk: Add support for power of two type dividers clk: mxs: imx28: decrease the frequency of ref_io1 for SSP2 and SSP3 clk: mxs: add clkdev lookup for pwm clk: mxs: Fix the GPMI clock name ...
Diffstat (limited to 'drivers/clk/clk-fixed-rate.c')
-rw-r--r--drivers/clk/clk-fixed-rate.c25
1 files changed, 24 insertions, 1 deletions
diff --git a/drivers/clk/clk-fixed-rate.c b/drivers/clk/clk-fixed-rate.c
index cbd24622978..f5ec0eebd4d 100644
--- a/drivers/clk/clk-fixed-rate.c
+++ b/drivers/clk/clk-fixed-rate.c
@@ -14,6 +14,7 @@
#include <linux/slab.h>
#include <linux/io.h>
#include <linux/err.h>
+#include <linux/of.h>
/*
* DOC: basic fixed-rate clock that cannot gate
@@ -63,7 +64,7 @@ struct clk *clk_register_fixed_rate(struct device *dev, const char *name,
init.name = name;
init.ops = &clk_fixed_rate_ops;
- init.flags = flags;
+ init.flags = flags | CLK_IS_BASIC;
init.parent_names = (parent_name ? &parent_name: NULL);
init.num_parents = (parent_name ? 1 : 0);
@@ -79,3 +80,25 @@ struct clk *clk_register_fixed_rate(struct device *dev, const char *name,
return clk;
}
+
+#ifdef CONFIG_OF
+/**
+ * of_fixed_clk_setup() - Setup function for simple fixed rate clock
+ */
+void __init of_fixed_clk_setup(struct device_node *node)
+{
+ struct clk *clk;
+ const char *clk_name = node->name;
+ u32 rate;
+
+ if (of_property_read_u32(node, "clock-frequency", &rate))
+ return;
+
+ of_property_read_string(node, "clock-output-names", &clk_name);
+
+ clk = clk_register_fixed_rate(NULL, clk_name, NULL, CLK_IS_ROOT, rate);
+ if (clk)
+ of_clk_add_provider(node, of_clk_src_simple_get, clk);
+}
+EXPORT_SYMBOL_GPL(of_fixed_clk_setup);
+#endif