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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-12-06 08:25:16 +0000
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-12-13 09:12:07 +0000
commit70d13e083c8589dd3edc2313777655da39cb3568 (patch)
tree41478a4699b3cbc8c5598ccc1863ea058948741e /drivers/char/nwflash.c
parent7ec80ddf0455ff3854a5ca524952d91b5eb676b2 (diff)
[ARM] netwinder: clean up GPIO naming
Netwinder was using gpio_xxx names which could clash with the GPIO layer. Add a 'nw_' prefix to ensure that these remain separate. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'drivers/char/nwflash.c')
-rw-r--r--drivers/char/nwflash.c8
1 files changed, 3 insertions, 5 deletions
diff --git a/drivers/char/nwflash.c b/drivers/char/nwflash.c
index 006be92ee3f..8c7df5ba088 100644
--- a/drivers/char/nwflash.c
+++ b/drivers/char/nwflash.c
@@ -58,8 +58,6 @@ static volatile unsigned char *FLASH_BASE;
static int gbFlashSize = KFLASH_SIZE;
static DEFINE_MUTEX(nwflash_mutex);
-extern spinlock_t gpio_lock;
-
static int get_flash_id(void)
{
volatile unsigned int c1, c2;
@@ -616,9 +614,9 @@ static void kick_open(void)
* we want to write a bit pattern XXX1 to Xilinx to enable
* the write gate, which will be open for about the next 2ms.
*/
- spin_lock_irqsave(&gpio_lock, flags);
- cpld_modify(1, 1);
- spin_unlock_irqrestore(&gpio_lock, flags);
+ spin_lock_irqsave(&nw_gpio_lock, flags);
+ nw_cpld_modify(CPLD_FLASH_WR_ENABLE, CPLD_FLASH_WR_ENABLE);
+ spin_unlock_irqrestore(&nw_gpio_lock, flags);
/*
* let the ISA bus to catch on...