[libata #pata-drivers] Trim trailing whitespace.

25 files changed, 456 insertions, 456 deletions

diff --git a/drivers/ata/ata_generic.c b/drivers/ata/ata_generic.c
index 20b191dcf7e..1d1c30a2fcd 100644
--- a/drivers/ata/ata_generic.c
+++ b/drivers/ata/ata_generic.c
@@ -2,18 +2,18 @@
  *  ata_generic.c - Generic PATA/SATA controller driver.
  *  Copyright 2005 Red Hat Inc <alan@redhat.com>, all rights reserved.
  *
- *  Elements from ide/pci/generic.c 
+ *  Elements from ide/pci/generic.c
  *	    Copyright (C) 2001-2002	Andre Hedrick <andre@linux-ide.org>
  *	    Portions (C) Copyright 2002  Red Hat Inc <alan@redhat.com>
  *
  *  May be copied or modified under the terms of the GNU General Public License
- *  
+ *
  *  Driver for PCI IDE interfaces implementing the standard bus mastering
  *  interface functionality. This assumes the BIOS did the drive set up and
  *  tuning for us. By default we do not grab all IDE class devices as they
  *  may have other drivers or need fixups to avoid problems. Instead we keep
  *  a default list of stuff without documentation/driver that appears to
- *  work.  
+ *  work.
  */
 
 #include <linux/kernel.h>
@@ -38,7 +38,7 @@
  *
  *	Set up cable type and use generic probe init
  */
- 
+
 static int generic_pre_reset(struct ata_port *ap)
 {
 	ap->cbl = ATA_CBL_PATA80;
@@ -55,7 +55,7 @@ static int generic_pre_reset(struct ata_port *ap)
  *	None (inherited from caller).
  */
 
- 
+
 static void generic_error_handler(struct ata_port *ap)
 {
 	ata_bmdma_drive_eh(ap, generic_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
@@ -68,9 +68,9 @@ static void generic_error_handler(struct ata_port *ap)
  *	Use a non standard set_mode function. We don't want to be tuned.
  *	The BIOS configured everything. Our job is not to fiddle. We
  *	read the dma enabled bits from the PCI configuration of the device
- *	and respect them. 
+ *	and respect them.
  */
- 
+
 static void generic_set_mode(struct ata_port *ap)
 {
 	int dma_enabled = 0;
@@ -79,14 +79,14 @@ static void generic_set_mode(struct ata_port *ap)
 	/* Bits 5 and 6 indicate if DMA is active on master/slave */
 	if (ap->ioaddr.bmdma_addr)
 		dma_enabled = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
-	
+
 	for (i = 0; i < ATA_MAX_DEVICES; i++) {
 		struct ata_device *dev = &ap->device[i];
 		if (ata_dev_enabled(dev)) {
 			/* We don't really care */
 			dev->pio_mode = XFER_PIO_0;
 			dev->dma_mode = XFER_MW_DMA_0;
-			/* We do need the right mode information for DMA or PIO 
+			/* We do need the right mode information for DMA or PIO
 			   and this comes from the current configuration flags */
 			if (dma_enabled & (1 << (5 + i))) {
 				dev->xfer_mode = XFER_MW_DMA_0;
@@ -121,7 +121,7 @@ static struct scsi_host_template generic_sht = {
 
 static struct ata_port_operations generic_port_ops = {
 	.set_mode	= generic_set_mode,
-	
+
 	.port_disable	= ata_port_disable,
 	.tf_load	= ata_tf_load,
 	.tf_read	= ata_tf_read,
@@ -133,7 +133,7 @@ static struct ata_port_operations generic_port_ops = {
 	.bmdma_start 	= ata_bmdma_start,
 	.bmdma_stop	= ata_bmdma_stop,
 	.bmdma_status 	= ata_bmdma_status,
-	
+
 	.data_xfer	= ata_pio_data_xfer,
 
 	.freeze		= ata_bmdma_freeze,
@@ -150,8 +150,8 @@ static struct ata_port_operations generic_port_ops = {
 	.port_start	= ata_port_start,
 	.port_stop	= ata_port_stop,
 	.host_stop	= ata_host_stop
-};	
-	
+};
+
 static int all_generic_ide;		/* Set to claim all devices */
 
 /**
@@ -160,10 +160,10 @@ static int all_generic_ide;		/* Set to claim all devices */
  *	@id: match entry
  *
  *	Called each time a matching IDE interface is found. We check if the
- *	interface is one we wish to claim and if so we perform any chip 
+ *	interface is one we wish to claim and if so we perform any chip
  *	specific hacks then let the ATA layer do the heavy lifting.
  */
- 
+
 static int ata_generic_init_one(struct pci_dev *dev, const struct pci_device_id *id)
 {
 	u16 command;
@@ -176,7 +176,7 @@ static int ata_generic_init_one(struct pci_dev *dev, const struct pci_device_id
 		.port_ops = &generic_port_ops
 	};
 	static struct ata_port_info *port_info[2] = { &info, &info };
-		
+
 	/* Don't use the generic entry unless instructed to do so */
 	if (id->driver_data == 1 && all_generic_ide == 0)
 		return -ENODEV;
@@ -197,7 +197,7 @@ static int ata_generic_init_one(struct pci_dev *dev, const struct pci_device_id
 	pci_read_config_word(dev, PCI_COMMAND, &command);
 	if (!(command & PCI_COMMAND_IO))
 		return -ENODEV;
-		
+
 	if (dev->vendor == PCI_VENDOR_ID_AL)
 	    	ata_pci_clear_simplex(dev);
 
@@ -207,7 +207,7 @@ static int ata_generic_init_one(struct pci_dev *dev, const struct pci_device_id
 static struct pci_device_id ata_generic[] = {
 	{ PCI_DEVICE(PCI_VENDOR_ID_PCTECH, PCI_DEVICE_ID_PCTECH_SAMURAI_IDE), },
 	{ PCI_DEVICE(PCI_VENDOR_ID_HOLTEK, PCI_DEVICE_ID_HOLTEK_6565), },
-	{ PCI_DEVICE(PCI_VENDOR_ID_UMC,    PCI_DEVICE_ID_UMC_UM8673F), }, 
+	{ PCI_DEVICE(PCI_VENDOR_ID_UMC,    PCI_DEVICE_ID_UMC_UM8673F), },
 	{ PCI_DEVICE(PCI_VENDOR_ID_UMC,    PCI_DEVICE_ID_UMC_UM8886A), },
 	{ PCI_DEVICE(PCI_VENDOR_ID_UMC,    PCI_DEVICE_ID_UMC_UM8886BF), },
 	{ PCI_DEVICE(PCI_VENDOR_ID_HINT,   PCI_DEVICE_ID_HINT_VXPROII_IDE), },
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index 12b3a42fb35..1a4c03d5de9 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -127,7 +127,7 @@ enum {
 	ich6_sata_ahci		= 8,
 	ich6m_sata_ahci		= 9,
 	ich8_sata_ahci		= 10,
-	
+
 	/* constants for mapping table */
 	P0			= 0,  /* port 0 */
 	P1			= 1,  /* port 1 */
@@ -196,7 +196,7 @@ static const struct pci_device_id piix_pci_tbl[] = {
 	{ 0x8086, 0x24DB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_133 },
 	/* C-ICH (i810E2) */
 	{ 0x8086, 0x245B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
-	/* ESB (855GME/875P + 6300ESB) UDMA 100  */	
+	/* ESB (855GME/875P + 6300ESB) UDMA 100  */
 	{ 0x8086, 0x25A2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
 	/* ICH6 (and 6) (i915) UDMA 100 */
 	{ 0x8086, 0x266F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
@@ -458,7 +458,7 @@ static struct ata_port_info piix_port_info[] = {
 		.udma_mask	= ATA_UDMA4,
 		.port_ops	= &ich_pata_ops,
 	},
-	
+
 	/* ich_pata_100: 3 */
 	{
 		.sht		= &piix_sht,
@@ -759,7 +759,7 @@ static void piix_set_piomode (struct ata_port *ap, struct ata_device *adev)
 	u8 slave_data;
 	u8 udma_enable;
 	int control = 0;
-	
+
 	/*
 	 *	See Intel Document 298600-004 for the timing programing rules
 	 *	for ICH controllers.
@@ -777,7 +777,7 @@ static void piix_set_piomode (struct ata_port *ap, struct ata_device *adev)
 	if (ata_pio_need_iordy(adev))
 		control |= 2;	/* IE enable */
 
-	/* Intel specifies that the PPE functionality is for disk only */	   
+	/* Intel specifies that the PPE functionality is for disk only */
 	if (adev->class == ATA_DEV_ATA)
 		control |= 4;	/* PPE enable */
 
@@ -806,7 +806,7 @@ static void piix_set_piomode (struct ata_port *ap, struct ata_device *adev)
 
 	/* Ensure the UDMA bit is off - it will be turned back on if
 	   UDMA is selected */
-	   
+
 	if (ap->udma_mask) {
 		pci_read_config_byte(dev, 0x48, &udma_enable);
 		udma_enable &= ~(1 << (2 * ap->port_no + adev->devno));
@@ -835,7 +835,7 @@ static void do_pata_set_dmamode (struct ata_port *ap, struct ata_device *adev, i
 	u8 speed		= adev->dma_mode;
 	int devid		= adev->devno + 2 * ap->port_no;
 	u8 udma_enable;
-	
+
 	static const	 /* ISP  RTC */
 	u8 timings[][2]	= { { 0, 0 },
 			    { 0, 0 },
@@ -851,13 +851,13 @@ static void do_pata_set_dmamode (struct ata_port *ap, struct ata_device *adev, i
 		u16 udma_timing;
 		u16 ideconf;
 		int u_clock, u_speed;
-		
+
 		/*
 	 	 * UDMA is handled by a combination of clock switching and
-		 * selection of dividers 
-		 *  
+		 * selection of dividers
+		 *
 		 * Handy rule: Odd modes are UDMATIMx 01, even are 02
-		 *	       except UDMA0 which is 00 
+		 *	       except UDMA0 which is 00
 		 */
 		u_speed = min(2 - (udma & 1), udma);
 		if (udma == 5)
@@ -866,16 +866,16 @@ static void do_pata_set_dmamode (struct ata_port *ap, struct ata_device *adev, i
 			u_clock = 1;		/* 66Mhz */
 		else
 			u_clock = 0;		/* 33Mhz */
-			
+
 		udma_enable |= (1 << devid);
-			
+
 		/* Load the CT/RP selection */
 		pci_read_config_word(dev, 0x4A, &udma_timing);
 		udma_timing &= ~(3 << (4 * devid));
 		udma_timing |= u_speed << (4 * devid);
 		pci_write_config_word(dev, 0x4A, udma_timing);
 
-		if (isich) {		
+		if (isich) {
 			/* Select a 33/66/100Mhz clock */
 			pci_read_config_word(dev, 0x54, &ideconf);
 			ideconf &= ~(0x1001 << devid);
@@ -897,12 +897,12 @@ static void do_pata_set_dmamode (struct ata_port *ap, struct ata_device *adev, i
 			XFER_PIO_0, XFER_PIO_3, XFER_PIO_4
 		};
 		int pio = needed_pio[mwdma] - XFER_PIO_0;
-		
+
 		control = 3;	/* IORDY|TIME1 */
-		
+
 		/* If the drive MWDMA is faster than it can do PIO then
 		   we must force PIO into PIO0 */
-		   
+
 		if (adev->pio_mode < needed_pio[mwdma])
 			/* Enable DMA timing only */
 			control |= 8;	/* PIO cycles in PIO0 */
@@ -916,7 +916,7 @@ static void do_pata_set_dmamode (struct ata_port *ap, struct ata_device *adev, i
 			slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << (ap->port_no ? 4 : 0);
 			pci_write_config_byte(dev, 0x44, slave_data);
 		} else { 	/* Master */
-			master_data &= 0xCCF4;	/* Mask out IORDY|TIME1|DMAONLY 
+			master_data &= 0xCCF4;	/* Mask out IORDY|TIME1|DMAONLY
 						   and master timing bits */
 			master_data |= control;
 			master_data |=
diff --git a/drivers/ata/pata_ali.c b/drivers/ata/pata_ali.c
index 0e0415ecfce..8448ee6e0ee 100644
--- a/drivers/ata/pata_ali.c
+++ b/drivers/ata/pata_ali.c
@@ -184,7 +184,7 @@ static void ali_fifo_control(struct ata_port *ap, struct ata_device *adev, int o
 	/* ATA - FIFO on set nibble to 0x05, ATAPI - FIFO off, set nibble to
 	   0x00. Not all the docs agree but the behaviour we now use is the
 	   one stated in the BIOS Programming Guide */
-	   
+
 	pci_read_config_byte(pdev, pio_fifo, &fifo);
 	fifo &= ~(0x0F << shift);
 	if (on)
@@ -526,7 +526,7 @@ static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
 		.sht = &ali_sht,
 		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48,
 		.pio_mask = 0x1f,
-		.mwdma_mask = 0x07, 
+		.mwdma_mask = 0x07,
 		.udma_mask = 0x07,	/* UDMA33 */
 		.port_ops = &ali_20_port_ops
 	};
diff --git a/drivers/ata/pata_amd.c b/drivers/ata/pata_amd.c
index 6ab568428a1..b3f60fdb02d 100644
--- a/drivers/ata/pata_amd.c
+++ b/drivers/ata/pata_amd.c
@@ -136,7 +136,7 @@ static int amd_pre_reset(struct ata_port *ap)
 
 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 	u8 ata66;
-	
+
 	if (!pci_test_config_bits(pdev, &amd_enable_bits[ap->port_no])) {
 		ata_port_disable(ap);
 		printk(KERN_INFO "ata%u: port disabled. ignoring.\n", ap->id);
diff --git a/drivers/ata/pata_cmd64x.c b/drivers/ata/pata_cmd64x.c
index 03284611a72..abf1bb7bd32 100644
--- a/drivers/ata/pata_cmd64x.c
+++ b/drivers/ata/pata_cmd64x.c
@@ -20,7 +20,7 @@
  * TODO
  *	Testing work
  */
- 
+
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/pci.h>
@@ -36,7 +36,7 @@
 /*
  * CMD64x specific registers definition.
  */
- 
+
 enum {
 	CFR 		= 0x50,
 		CFR_INTR_CH0  = 0x02,
@@ -90,9 +90,9 @@ static int cmd648_pre_reset(struct ata_port *ap)
 	pci_read_config_byte(pdev, BMIDECSR, &r);
 	if (r & (1 << ap->port_no))
 		ap->cbl = ATA_CBL_PATA80;
-	else	
+	else
 		ap->cbl = ATA_CBL_PATA40;
-		
+
 	return ata_std_prereset(ap);
 }
 
@@ -113,18 +113,18 @@ static void cmd648_error_handler(struct ata_port *ap)
  *
  *	Called to do the PIO mode setup.
  */
- 
+
 static void cmd64x_set_piomode(struct ata_port *ap, struct ata_device *adev)
 {
 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 	struct ata_timing t;
 	const unsigned long T = 1000000 / 33;
 	const u8 setup_data[] = { 0x40, 0x40, 0x40, 0x80, 0x00 };
-	
+
 	u8 reg;
-	
+
 	/* Port layout is not logical so use a table */
-	const u8 arttim_port[2][2] = { 
+	const u8 arttim_port[2][2] = {
 		{ ARTTIM0, ARTTIM1 },
 		{ ARTTIM23, ARTTIM23 }
 	};
@@ -132,11 +132,11 @@ static void cmd64x_set_piomode(struct ata_port *ap, struct ata_device *adev)
 		{ DRWTIM0, DRWTIM1 },
 		{ DRWTIM2, DRWTIM3 }
 	};
-	
+
 	int arttim = arttim_port[ap->port_no][adev->devno];
 	int drwtim = drwtim_port[ap->port_no][adev->devno];
-	
-	
+
+
 	if (ata_timing_compute(adev, adev->pio_mode, &t, T, 0) < 0) {
 		printk(KERN_ERR DRV_NAME ": mode computation failed.\n");
 		return;
@@ -144,14 +144,14 @@ static void cmd64x_set_piomode(struct ata_port *ap, struct ata_device *adev)
 	if (ap->port_no) {
 		/* Slave has shared address setup */
 		struct ata_device *pair = ata_dev_pair(adev);
-		
+
 		if (pair) {
 			struct ata_timing tp;
 			ata_timing_compute(pair, pair->pio_mode, &tp, T, 0);
 			ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP);
 		}
 	}
-	
+
 	printk(KERN_DEBUG DRV_NAME ": active %d recovery %d setup %d.\n",
 		t.active, t.recover, t.setup);
 	if (t.recover > 16) {
@@ -160,30 +160,30 @@ static void cmd64x_set_piomode(struct ata_port *ap, struct ata_device *adev)
 	}
 	if (t.active > 16)
 		t.active = 16;
-		
+
 	/* Now convert the clocks into values we can actually stuff into
 	   the chip */
-	   
+
 	if (t.recover > 1)
 		t.recover--;
 	else
 		t.recover = 15;
-	
+
 	if (t.setup > 4)
 		t.setup = 0xC0;
 	else
 		t.setup = setup_data[t.setup];
-		
+
 	t.active &= 0x0F;	/* 0 = 16 */
-	
+
 	/* Load setup timing */
 	pci_read_config_byte(pdev, arttim, &reg);
 	reg &= 0x3F;
 	reg |= t.setup;
 	pci_write_config_byte(pdev, arttim, reg);
-	
+
 	/* Load active/recovery */
-	pci_write_config_byte(pdev, drwtim, (t.active << 4) | t.recover);	
+	pci_write_config_byte(pdev, drwtim, (t.active << 4) | t.recover);
 }
 
 /**
@@ -193,29 +193,29 @@ static void cmd64x_set_piomode(struct ata_port *ap, struct ata_device *adev)
  *
  *	Called to do the DMA mode setup.
  */
- 
+
 static void cmd64x_set_dmamode(struct ata_port *ap, struct ata_device *adev)
 {
 	static const u8 udma_data[] = {
 		0x31, 0x21, 0x11, 0x25, 0x15, 0x05
 	};
-	static const u8 mwdma_data[] = { 
+	static const u8 mwdma_data[] = {
 		0x30, 0x20, 0x10
 	};
-	
+
 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 	u8 regU, regD;
 
 	int pciU = UDIDETCR0 + 8 * ap->port_no;
 	int pciD = BMIDESR0 + 8 * ap->port_no;
 	int shift = 2 * adev->devno;
-	
+
 	pci_read_config_byte(pdev, pciD, &regD);
 	pci_read_config_byte(pdev, pciU, &regU);
 
 	regD &= ~(0x20 << shift);
 	regU &= ~(0x35 << shift);
-	
+
 	if (adev->dma_mode >= XFER_UDMA_0)
 		regU |= udma_data[adev->dma_mode - XFER_UDMA_0] << shift;
 	else
@@ -241,13 +241,13 @@ static void cmd648_bmdma_stop(struct ata_queued_cmd *qc)
 	u8 dma_intr;
 	int dma_reg = ap->port_no ? ARTTIM23_INTR_CH1 : CFR_INTR_CH0;
 	int dma_mask = ap->port_no ? ARTTIM2 : CFR;
-	
+
 	ata_bmdma_stop(qc);
-	
+
 	pci_read_config_byte(pdev, dma_reg, &dma_intr);
 	pci_write_config_byte(pdev, dma_reg, dma_intr | dma_mask);
 }
-		
+
 /**
  *	cmd646r1_dma_stop	-	DMA stop callback
  *	@qc: Command in progress
@@ -259,7 +259,7 @@ static void cmd646r1_bmdma_stop(struct ata_queued_cmd *qc)
 {
 	ata_bmdma_stop(qc);
 }
-		
+
 static struct scsi_host_template cmd64x_sht = {
 	.module			= THIS_MODULE,
 	.name			= DRV_NAME,
@@ -306,11 +306,11 @@ static struct ata_port_operations cmd64x_port_ops = {
 
 	.irq_handler	= ata_interrupt,
 	.irq_clear	= ata_bmdma_irq_clear,
-	
+
 	.port_start	= ata_port_start,
 	.port_stop	= ata_port_stop,
 	.host_stop	= ata_host_stop
-};	
+};
 
 static struct ata_port_operations cmd646r1_port_ops = {
 	.port_disable	= ata_port_disable,
@@ -340,11 +340,11 @@ static struct ata_port_operations cmd646r1_port_ops = {
 
 	.irq_handler	= ata_interrupt,
 	.irq_clear	= ata_bmdma_irq_clear,
-	
+
 	.port_start	= ata_port_start,
 	.port_stop	= ata_port_stop,
 	.host_stop	= ata_host_stop
-};	
+};
 
 static struct ata_port_operations cmd648_port_ops = {
 	.port_disable	= ata_port_disable,
@@ -374,16 +374,16 @@ static struct ata_port_operations cmd648_port_ops = {
 
 	.irq_handler	= ata_interrupt,
 	.irq_clear	= ata_bmdma_irq_clear,
-	
+
 	.port_start	= ata_port_start,
 	.port_stop	= ata_port_stop,
 	.host_stop	= ata_host_stop
-};	
-	
+};
+
 static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
 {
 	u32 class_rev;
-	
+
 	static struct ata_port_info cmd_info[6] = {
 		{	/* CMD 643 - no UDMA */
 			.sht = &cmd64x_sht,
@@ -433,15 +433,15 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
 	};
 	static struct ata_port_info *port_info[2], *info;
 	u8 mrdmode;
-	
+
 	info = &cmd_info[id->driver_data];
-	
+
 	pci_read_config_dword(pdev, PCI_CLASS_REVISION, &class_rev);
 	class_rev &= 0xFF;
-	
+
 	if (id->driver_data == 0)	/* 643 */
 		ata_pci_clear_simplex(pdev);
-	
+
 	if (pdev->device == PCI_DEVICE_ID_CMD_646) {
 		/* Does UDMA work ? */
 		if (class_rev > 4)
@@ -456,14 +456,14 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
 	mrdmode &= ~ 0x30;	/* IRQ set up */
 	mrdmode |= 0x02;	/* Memory read line enable */
 	pci_write_config_byte(pdev, MRDMODE, mrdmode);
-	
+
 	/* Force PIO 0 here.. */
-	
+
 	/* PPC specific fixup copied from old driver */
 #ifdef CONFIG_PPC
 	pci_write_config_byte(pdev, UDIDETCR0, 0xF0);
 #endif
-	
+
 	port_info[0] = port_info[1] = info;
 	return ata_pci_init_one(pdev, port_info, 2);
 }
diff --git a/drivers/ata/pata_cypress.c b/drivers/ata/pata_cypress.c
index 322043d8cf7..fd55474e0d1 100644
--- a/drivers/ata/pata_cypress.c
+++ b/drivers/ata/pata_cypress.c
@@ -7,7 +7,7 @@
  * linux/drivers/ide/pci/cy82c693.c		Version 0.40	Sep. 10, 2002
  *
  */
- 
+
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/pci.h>
@@ -59,7 +59,7 @@ static void cy82c693_error_handler(struct ata_port *ap)
  *
  *	Called to do the PIO mode setup.
  */
- 
+
 static void cy82c693_set_piomode(struct ata_port *ap, struct ata_device *adev)
 {
 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
@@ -67,7 +67,7 @@ static void cy82c693_set_piomode(struct ata_port *ap, struct ata_device *adev)
 	const unsigned long T = 1000000 / 33;
 	short time_16, time_8;
 	u32 addr;
-	
+
 	if (ata_timing_compute(adev, adev->pio_mode, &t, T, 1) < 0) {
 		printk(KERN_ERR DRV_NAME ": mome computation failed.\n");
 		return;
@@ -75,20 +75,20 @@ static void cy82c693_set_piomode(struct ata_port *ap, struct ata_device *adev)
 
 	time_16 = FIT(t.recover, 0, 15) | (FIT(t.active, 0, 15) << 4);
 	time_8 = FIT(t.act8b, 0, 15) | (FIT(t.rec8b, 0, 15) << 4);
-	
+
 	if (adev->devno == 0) {
 		pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr);
-		
+
 		addr &= ~0x0F;	/* Mask bits */
 		addr |= FIT(t.setup, 0, 15);
-		
+
 		pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr);
 		pci_write_config_byte(pdev, CY82_IDE_MASTER_IOR, time_16);
 		pci_write_config_byte(pdev, CY82_IDE_MASTER_IOW, time_16);
 		pci_write_config_byte(pdev, CY82_IDE_MASTER_8BIT, time_8);
 	} else {
 		pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr);
-		
+
 		addr &= ~0xF0;	/* Mask bits */
 		addr |= (FIT(t.setup, 0, 15) << 4);
 
@@ -106,15 +106,15 @@ static void cy82c693_set_piomode(struct ata_port *ap, struct ata_device *adev)
  *
  *	Called to do the DMA mode setup.
  */
- 
+
 static void cy82c693_set_dmamode(struct ata_port *ap, struct ata_device *adev)
 {
 	int reg = CY82_INDEX_CHANNEL0 + ap->port_no;
-	
+
 	/* Be afraid, be very afraid. Magic registers  in low I/O space */
 	outb(reg, 0x22);
 	outb(adev->dma_mode - XFER_MW_DMA_0, 0x23);
-	
+
 	/* 0x50 gives the best behaviour on the Alpha's using this chip */
 	outb(CY82_INDEX_TIMEOUT, 0x22);
 	outb(0x50, 0x23);
@@ -143,7 +143,7 @@ static struct ata_port_operations cy82c693_port_ops = {
 	.set_piomode	= cy82c693_set_piomode,
 	.set_dmamode	= cy82c693_set_dmamode,
 	.mode_filter	= ata_pci_default_filter,
-	
+
 	.tf_load	= ata_tf_load,
 	.tf_read	= ata_tf_read,
 	.check_status 	= ata_check_status,
@@ -167,11 +167,11 @@ static struct ata_port_operations cy82c693_port_ops = {
 
 	.irq_handler	= ata_interrupt,
 	.irq_clear	= ata_bmdma_irq_clear,
-	
+
 	.port_start	= ata_port_start,
 	.port_stop	= ata_port_stop,
 	.host_stop	= ata_host_stop
-};	
+};
 
 static int cy82c693_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
 {
@@ -183,13 +183,13 @@ static int cy82c693_init_one(struct pci_dev *pdev, const struct pci_device_id *i
 		.port_ops = &cy82c693_port_ops
 	};
 	static struct ata_port_info *port_info[1] = { &info };
-	
+
 	/* Devfn 1 is the ATA primary. The secondary is magic and on devfn2. For the
 	   moment we don't handle the secondary. FIXME */
-	   
+
 	if (PCI_FUNC(pdev->devfn) != 1)
 		return -ENODEV;
-	
+
 	return ata_pci_init_one(pdev, port_info, 1);
 }
 
diff --git a/drivers/ata/pata_hpt366.c b/drivers/ata/pata_hpt366.c
index e54a0c51681..94bb1dfc3f1 100644
--- a/drivers/ata/pata_hpt366.c
+++ b/drivers/ata/pata_hpt366.c
@@ -168,7 +168,7 @@ static int hpt_dma_blacklisted(const struct ata_device *dev, char *modestr, cons
 
 	while(list[i] != NULL) {
 		if (!strncmp(list[i], s, len)) {
-			printk(KERN_WARNING DRV_NAME ": %s is not supported for %s.\n", 
+			printk(KERN_WARNING DRV_NAME ": %s is not supported for %s.\n",
 				modestr, list[i]);
 			return 1;
 		}
@@ -184,7 +184,7 @@ static int hpt_dma_blacklisted(const struct ata_device *dev, char *modestr, cons
  *
  *	Block UDMA on devices that cause trouble with this controller.
  */
- 
+
 static unsigned long hpt366_filter(const struct ata_port *ap, struct ata_device *adev, unsigned long mask)
 {
 	if (adev->class == ATA_DEV_ATA) {
@@ -206,11 +206,11 @@ static unsigned long hpt366_filter(const struct ata_port *ap, struct ata_device
  *	Return the 32bit register programming information for this channel
  *	that matches the speed provided.
  */
- 
+
 static u32 hpt36x_find_mode(struct ata_port *ap, int speed)
 {
 	struct hpt_clock *clocks = ap->host->private_data;
-	
+
 	while(clocks->xfer_speed) {
 		if (clocks->xfer_speed == speed)
 			return clocks->timing;
@@ -219,12 +219,12 @@ static u32 hpt36x_find_mode(struct ata_port *ap, int speed)
 	BUG();
 	return 0xffffffffU;	/* silence compiler warning */
 }
-	
+
 static int hpt36x_pre_reset(struct ata_port *ap)
 {
 	u8 ata66;
 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
-	
+
 	pci_read_config_byte(pdev, 0x5A, &ata66);
 	if (ata66 & (1 << ap->port_no))
 		ap->cbl = ATA_CBL_PATA40;
@@ -239,7 +239,7 @@ static int hpt36x_pre_reset(struct ata_port *ap)
  *
  *	Perform the reset handling for the 366/368
  */
- 
+
 static void hpt36x_error_handler(struct ata_port *ap)
 {
 	ata_bmdma_drive_eh(ap, hpt36x_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
@@ -250,9 +250,9 @@ static void hpt36x_error_handler(struct ata_port *ap)
  *	@ap: ATA interface
  *	@adev: device on the interface
  *
- *	Perform PIO mode setup. 
+ *	Perform PIO mode setup.
  */
- 
+
 static void hpt366_set_piomode(struct ata_port *ap, struct ata_device *adev)
 {
 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
@@ -263,14 +263,14 @@ static void hpt366_set_piomode(struct ata_port *ap, struct ata_device *adev)
 
 	addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no);
 	addr2 = 0x51 + 4 * ap->port_no;
-	
+
 	/* Fast interrupt prediction disable, hold off interrupt disable */
 	pci_read_config_byte(pdev, addr2, &fast);
 	if (fast & 0x80) {
 		fast &= ~0x80;
 		pci_write_config_byte(pdev, addr2, fast);
 	}
-	
+
 	pci_read_config_dword(pdev, addr1, &reg);
 	mode = hpt36x_find_mode(ap, adev->pio_mode);
 	mode &= ~0x8000000;	/* No FIFO in PIO */
@@ -287,7 +287,7 @@ static void hpt366_set_piomode(struct ata_port *ap, struct ata_device *adev)
  *	Set up the channel for MWDMA or UDMA modes. Much the same as with
  *	PIO, load the mode number and then set MWDMA or UDMA flag.
  */
- 
+
 static void hpt366_set_dmamode(struct ata_port *ap, struct ata_device *adev)
 {
 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
@@ -298,14 +298,14 @@ static void hpt366_set_dmamode(struct ata_port *ap, struct ata_device *adev)
 
 	addr1 = 0x40 + 4 * (adev->devno + 2 * ap->port_no);
 	addr2 = 0x51 + 4 * ap->port_no;
-	
+
 	/* Fast interrupt prediction disable, hold off interrupt disable */
 	pci_read_config_byte(pdev, addr2, &fast);
 	if (fast & 0x80) {
 		fast &= ~0x80;
 		pci_write_config_byte(pdev, addr2, fast);
 	}
-	
+
 	pci_read_config_dword(pdev, addr1, &reg);
 	mode = hpt36x_find_mode(ap, adev->dma_mode);
 	mode |= 0x8000000;	/* FIFO in MWDMA or UDMA */
@@ -335,13 +335,13 @@ static struct scsi_host_template hpt36x_sht = {
 /*
  *	Configuration for HPT366/68
  */
- 
+
 static struct ata_port_operations hpt366_port_ops = {
 	.port_disable	= ata_port_disable,
 	.set_piomode	= hpt366_set_piomode,
 	.set_dmamode	= hpt366_set_dmamode,
 	.mode_filter	= hpt366_filter,
-	
+
 	.tf_load	= ata_tf_load,
 	.tf_read	= ata_tf_read,
 	.check_status 	= ata_check_status,
@@ -369,7 +369,7 @@ static struct ata_port_operations hpt366_port_ops = {
 	.port_start	= ata_port_start,
 	.port_stop	= ata_port_stop,
 	.host_stop	= ata_host_stop
-};	
+};
 
 /**
  *	hpt36x_init_one		-	Initialise an HPT366/368
@@ -391,7 +391,7 @@ static struct ata_port_operations hpt366_port_ops = {
  *	HPT37x/30x		4 (HPT366)	3+	Other driver
  *
  */
- 
+
 static int hpt36x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
 {
 	static struct ata_port_info info_hpt366 = {
@@ -410,7 +410,7 @@ static int hpt36x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
 
 	pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
 	class_rev &= 0xFF;
-	
+
 	/* May be a later chip in disguise. Check */
 	/* Newer chips are not in the HPT36x driver. Ignore them */
 	if (class_rev > 2)
@@ -426,7 +426,7 @@ static int hpt36x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
 		pci_write_config_byte(dev, 0x51, drive_fast & ~0x80);
 
 	pci_read_config_dword(dev, 0x40,  &reg1);
-	
+
 	/* PCI clocking determines the ATA timing values to use */
 	/* info_hpt366 is safe against re-entry so we can scribble on it */
 	switch(reg1 & 0x700) {
diff --git a/drivers/ata/pata_hpt37x.c b/drivers/ata/pata_hpt37x.c
index 7c3da53f1e0..532a7928f80 100644
--- a/drivers/ata/pata_hpt37x.c
+++ b/drivers/ata/pata_hpt37x.c
@@ -134,7 +134,7 @@ static const struct hpt_clock hpt370a_timings_66[] = {
 	{	XFER_UDMA_0,	0x14a0e73f	},
 
 	{	XFER_MW_DMA_2,	0x2480fa73	},
-	{	XFER_MW_DMA_1,	0x2480fa77	}, 
+	{	XFER_MW_DMA_1,	0x2480fa77	},
 	{	XFER_MW_DMA_0,	0x2480fb3f	},
 
 	{	XFER_PIO_4,	0x0c82be73	},
@@ -333,11 +333,11 @@ static const struct hpt_chip hpt374 = {
  *	Return the 32bit register programming information for this channel
  *	that matches the speed provided.
  */
- 
+
 static u32 hpt37x_find_mode(struct ata_port *ap, int speed)
 {
 	struct hpt_clock *clocks = ap->host->private_data;
-	
+
 	while(clocks->xfer_speed) {
 		if (clocks->xfer_speed == speed)
 			return clocks->timing;
@@ -367,7 +367,7 @@ static int hpt_dma_blacklisted(const struct ata_device *dev, char *modestr, cons
 
 	while(list[i] != NULL) {
 		if (!strncmp(list[i], s, len)) {
-			printk(KERN_WARNING DRV_NAME ": %s is not supported for %s.\n", 
+			printk(KERN_WARNING DRV_NAME ": %s is not supported for %s.\n",
 				modestr, list[i]);
 			return 1;
 		}
@@ -413,7 +413,7 @@ static const char *bad_ata100_5[] = {
  *