diff options
| author | Jayachandran C <jchandra@broadcom.com> | 2013-06-10 06:33:26 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2013-06-13 17:46:41 +0200 |
| commit | 8f0b043045d0b19d7eb8b510bfe279c9bb05d952 (patch) | |
| tree | 628c65b873e62ee7c9c5b15cf0cf898725bb7b49 /arch | |
| parent | d6a5078459d95137d8d620787d1099a3016932a9 (diff) | |
MIPS: Netlogic: Support compressed kernel
Add SYS_SUPPORTS_ZBOOT and SYS_SUPPORTS_ZBOOT_UART16550 config options
for XLR and XLP.
Update boot/compressed/uart-16550.c to add UART port for XLR and XLP.
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5417/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/Kconfig | 4 | ||||
| -rw-r--r-- | arch/mips/boot/compressed/uart-16550.c | 12 |
2 files changed, 16 insertions, 0 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index a46b0a2f8f0..69bf31062ca 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -788,6 +788,8 @@ config NLM_XLR_BOARD select SYS_HAS_EARLY_PRINTK select USB_ARCH_HAS_OHCI if USB_SUPPORT select USB_ARCH_HAS_EHCI if USB_SUPPORT + select SYS_SUPPORTS_ZBOOT + select SYS_SUPPORTS_ZBOOT_UART16550 help Support for systems based on Netlogic XLR and XLS processors. Say Y here if you have a XLR or XLS based board. @@ -814,6 +816,8 @@ config NLM_XLP_BOARD select SYNC_R4K select SYS_HAS_EARLY_PRINTK select USE_OF + select SYS_SUPPORTS_ZBOOT + select SYS_SUPPORTS_ZBOOT_UART16550 help This board is based on Netlogic XLP Processor. Say Y here if you have a XLP based board. diff --git a/arch/mips/boot/compressed/uart-16550.c b/arch/mips/boot/compressed/uart-16550.c index 90ae4400c40..c01d343ce6a 100644 --- a/arch/mips/boot/compressed/uart-16550.c +++ b/arch/mips/boot/compressed/uart-16550.c @@ -23,6 +23,18 @@ #define PORT(offset) (UART0_BASE + (4 * offset)) #endif +#ifdef CONFIG_CPU_XLR +#define UART0_BASE 0x1EF14000 +#define PORT(offset) (CKSEG1ADDR(UART0_BASE) + (4 * offset)) +#define IOTYPE unsigned int +#endif + +#ifdef CONFIG_CPU_XLP +#define UART0_BASE 0x18030100 +#define PORT(offset) (CKSEG1ADDR(UART0_BASE) + (4 * offset)) +#define IOTYPE unsigned int +#endif + #ifndef IOTYPE #define IOTYPE char #endif |