diff options
author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-10-29 14:06:55 -0700 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-10-29 14:06:55 -0700 |
commit | 82798a17ad40df827d465329a20ace80497f9b32 (patch) | |
tree | 449ba69dc5a5e19a56b2a9d12d218f9486e5316d /arch | |
parent | db8185360d91c01f6e482db5ee402c0ad90dec52 (diff) | |
parent | 1a3b7920fe55247d39c3e1ac1e9b8aca607d0188 (diff) |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (34 commits)
[MIPS] tb0219: Update copyright message.
[MIPS] MT: Fix bug in multithreaded kernels.
[MIPS] Alchemy: Remove CONFIG_TS_AU1X00_ADS7846 from defconfigs.
Author: Ralf Baechle <ralf@linux-mips.org>
[MIPS] sb1250: Enable GenBus IDE in defconfig.
[MIPS] vmlinux.ld.S: correctly indent .data section
[MIPS] c-r3k: Implement flush_cache_range()
[MIPS] Store sign-extend register values for PTRACE_GETREGS
[MIPS] Alchemy: Register platform devices
[MIPS] Add len and addr validation for MAP_FIXED mappings.
[MIPS] IRIX: Fix off-by-one error in signal compat code.
[MIPS] time: Replace plat_timer_setup with modern APIs.
[MIPS] time: Fix cut'n'paste bug in Sibyte clockevent driver.
[MIPS] time: Make c0_compare_int_usable faster
[MIPS] time: Fix cevt-r4k.c for 64-bit kernel
[MIPS] Sibyte: Delete {sb1250,bcm1480}_steal_irq().
[MIPS] txx9tmr clockevent/clocksource driver
[MIPS] Add mips_hpt_frequency check to mips_clockevent_init().
[MIPS] IP32: Fixes after interrupt renumbering.
[MIPS] IP27: Fix slice logic to work for arbitrary number of slices.
...
Diffstat (limited to 'arch')
48 files changed, 697 insertions, 463 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 61262c5f9c6..97da953eb5d 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -583,6 +583,7 @@ config SNI_RM config TOSHIBA_JMR3927 bool "Toshiba JMR-TX3927 board" + select CEVT_TXX9 select DMA_NONCOHERENT select HW_HAS_PCI select MIPS_TX3927 @@ -597,6 +598,7 @@ config TOSHIBA_JMR3927 config TOSHIBA_RBTX4927 bool "Toshiba RBTX49[23]7 board" select CEVT_R4K + select CEVT_TXX9 select DMA_NONCOHERENT select HAS_TXX9_SERIAL select HW_HAS_PCI @@ -618,6 +620,7 @@ config TOSHIBA_RBTX4927 config TOSHIBA_RBTX4938 bool "Toshiba RBTX4938 board" select CEVT_R4K + select CEVT_TXX9 select DMA_NONCOHERENT select HAS_TXX9_SERIAL select HW_HAS_PCI @@ -736,6 +739,9 @@ config CEVT_GT641XX config CEVT_R4K bool +config CEVT_TXX9 + bool + config CFE bool diff --git a/arch/mips/au1000/common/irq.c b/arch/mips/au1000/common/irq.c index 59e932a928d..ddfb7f0a17a 100644 --- a/arch/mips/au1000/common/irq.c +++ b/arch/mips/au1000/common/irq.c @@ -318,38 +318,6 @@ static struct irq_chip level_irq_type = { .end = end_irq, }; -#ifdef CONFIG_PM -void startup_match20_interrupt(irq_handler_t handler) -{ - struct irq_desc *desc = &irq_desc[AU1000_TOY_MATCH2_INT]; - - static struct irqaction action; - memset(&action, 0, sizeof(struct irqaction)); - - /* - * This is a big problem.... since we didn't use request_irq - * when kernel/irq.c calls probe_irq_xxx this interrupt will - * be probed for usage. This will end up disabling the device :( - * Give it a bogus "action" pointer -- this will keep it from - * getting auto-probed! - * - * By setting the status to match that of request_irq() we - * can avoid it. --cgray - */ - action.dev_id = handler; - action.flags = IRQF_DISABLED; - cpus_clear(action.mask); - action.name = "Au1xxx TOY"; - action.handler = handler; - action.next = NULL; - - desc->action = &action; - desc->status &= ~(IRQ_DISABLED | IRQ_AUTODETECT | IRQ_WAITING | IRQ_INPROGRESS); - - local_enable_irq(AU1000_TOY_MATCH2_INT); -} -#endif - static void __init setup_local_irq(unsigned int irq_nr, int type, int int_req) { unsigned int bit = irq_nr - AU1000_INTC0_INT_BASE; diff --git a/arch/mips/au1000/common/time.c b/arch/mips/au1000/common/time.c index 2556399708b..f113b512d7b 100644 --- a/arch/mips/au1000/common/time.c +++ b/arch/mips/au1000/common/time.c @@ -67,7 +67,7 @@ static DEFINE_SPINLOCK(time_lock); unsigned long wtimer; #ifdef CONFIG_PM -irqreturn_t counter0_irq(int irq, void *dev_id) +static irqreturn_t counter0_irq(int irq, void *dev_id) { unsigned long pc0; int time_elapsed; @@ -117,6 +117,13 @@ irqreturn_t counter0_irq(int irq, void *dev_id) return IRQ_HANDLED; } +struct irqaction counter0_action = { + .handler = counter0_irq, + .flags = IRQF_DISABLED, + .name = "alchemy-toy", + .dev_id = NULL, +}; + /* When we wakeup from sleep, we have to "catch up" on all of the * timer ticks we have missed. */ @@ -221,7 +228,7 @@ unsigned long cal_r4koff(void) return (cpu_speed / HZ); } -void __init plat_timer_setup(struct irqaction *irq) +void __init plat_time_init(void) { unsigned int est_freq; @@ -255,15 +262,10 @@ void __init plat_timer_setup(struct irqaction *irq) * we do this. */ if (no_au1xxx_32khz) { - unsigned int c0_status; - printk("WARNING: no 32KHz clock found.\n"); - /* Ensure we get CPO_COUNTER interrupts. - */ - c0_status = read_c0_status(); - c0_status |= IE_IRQ5; - write_c0_status(c0_status); + /* Ensure we get CPO_COUNTER interrupts. */ + set_c0_status(IE_IRQ5); } else { while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_C0S); @@ -280,7 +282,7 @@ void __init plat_timer_setup(struct irqaction *irq) au_writel(last_match20 + MATCH20_INC, SYS_TOYMATCH2); au_sync(); while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_M20); - startup_match20_interrupt(counter0_irq); + setup_irq(AU1000_TOY_MATCH2_INT, &counter0_action); /* We can use the real 'wait' instruction. */ diff --git a/arch/mips/au1000/mtx-1/Makefile b/arch/mips/au1000/mtx-1/Makefile index 764bf9f7e28..afa7007d67f 100644 --- a/arch/mips/au1000/mtx-1/Makefile +++ b/arch/mips/au1000/mtx-1/Makefile @@ -8,3 +8,4 @@ # lib-y := init.o board_setup.o irqmap.o +obj-y := platform.o diff --git a/arch/mips/au1000/mtx-1/platform.c b/arch/mips/au1000/mtx-1/platform.c new file mode 100644 index 00000000000..01ebff67797 --- /dev/null +++ b/arch/mips/au1000/mtx-1/platform.c @@ -0,0 +1,86 @@ +/* + * MTX-1 platform devices registration + * + * Copyright (C) 2007, Florian Fainelli <florian@openwrt.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <linux/init.h> +#include <linux/types.h> +#include <linux/platform_device.h> +#include <linux/leds.h> + +#include <asm/gpio.h> + +static struct resource mtx1_wdt_res[] = { + [0] = { + .start = 15, + .end = 15, + .name = "mtx1-wdt-gpio", + .flags = IORESOURCE_IRQ, + } +}; + +static struct resource mtx1_sys_btn[] = { + [0] = { + .start = 7, + .end = 7, + .name = "mtx1-sys-btn-gpio", + .flags = IORESOURCE_IRQ, + } +}; + +static struct platform_device mtx1_wdt = { + .name = "mtx1-wdt", + .id = 0, + .num_resources = ARRAY_SIZE(mtx1_wdt_res), + .resource = mtx1_wdt_res, +}; + +static struct gpio_led default_leds[] = { + { + .name = "mtx1:green", + .gpio = 211, + }, { + .name = "mtx1:red", + .gpio = 212, + }, +}; + +static struct gpio_led_platform_data mtx1_led_data = { + .num_leds = ARRAY_SIZE(default_leds), + .leds = default_leds, +}; + +static struct platform_device mtx1_gpio_leds = { + .name = "leds-gpio", + .id = -1, + .dev = { + .platform_data = &mtx1_led_data, + } +}; + +static struct __initdata platform_device * mtx1_devs[] = { + &mtx1_gpio_leds, + &mtx1_wdt +}; + +static int __init mtx1_register_devices(void) +{ + return platform_add_devices(mtx1_devs, ARRAY_SIZE(mtx1_devs)); +} + +arch_initcall(mtx1_register_devices); diff --git a/arch/mips/basler/excite/excite_setup.c b/arch/mips/basler/excite/excite_setup.c index 404ca9284b3..24378b9223f 100644 --- a/arch/mips/basler/excite/excite_setup.c +++ b/arch/mips/basler/excite/excite_setup.c @@ -68,24 +68,23 @@ DEFINE_SPINLOCK(titan_lock); int titan_irqflags; +/* + * The eXcite platform uses the alternate timer interrupt + * + * Fixme: At the time of this writing cevt-r4k.c doesn't yet know about how + * to handle the alternate timer interrupt of the RM9000. + */ void __init plat_time_init(void) { const u32 modebit5 = ocd_readl(0x00e4); - unsigned int - mult = ((modebit5 >> 11) & 0x1f) + 2, - div = ((modebit5 >> 16) & 0x1f) + 2; + unsigned int mult = ((modebit5 >> 11) & 0x1f) + 2, + unsigned int div = ((modebit5 >> 16) & 0x1f) + 2; - if (div == 33) div = 1; + if (div == 33) + div = 1; mips_hpt_frequency = EXCITE_CPU_EXT_CLOCK * mult / div / 2; } -void __init plat_timer_setup(struct irqaction *irq) -{ - /* The eXcite platform uses the alternate timer interrupt */ - set_c0_intcontrol(0x80); - setup_irq(TIMER_IRQ, irq); -} - static int __init excite_init_console(void) { #if defined(CONFIG_SERIAL_8250) diff --git a/arch/mips/configs/db1000_defconfig b/arch/mips/configs/db1000_defconfig index 885b633647e..5a8b7acb7dd 100644 --- a/arch/mips/configs/db1000_defconfig +++ b/arch/mips/configs/db1000_defconfig @@ -738,7 +738,6 @@ CONFIG_HW_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y # CONFIG_SERIAL_NONSTANDARD is not set # CONFIG_AU1X00_GPIO is not set -# CONFIG_TS_AU1X00_ADS7846 is not set # # Serial drivers diff --git a/arch/mips/configs/db1100_defconfig b/arch/mips/configs/db1100_defconfig index e3c3a07e8a7..d4ed90bca26 100644 --- a/arch/mips/configs/db1100_defconfig +++ b/arch/mips/configs/db1100_defconfig @@ -714,7 +714,6 @@ CONFIG_HW_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y # CONFIG_SERIAL_NONSTANDARD is not set # CONFIG_AU1X00_GPIO is not set -# CONFIG_TS_AU1X00_ADS7846 is not set # # Serial drivers diff --git a/arch/mips/configs/db1200_defconfig b/arch/mips/configs/db1200_defconfig index 9aa7c3ebfa3..a055657e698 100644 --- a/arch/mips/configs/db1200_defconfig +++ b/arch/mips/configs/db1200_defconfig @@ -775,7 +775,6 @@ CONFIG_HW_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y # CONFIG_SERIAL_NONSTANDARD is not set # CONFIG_AU1X00_GPIO is not set -# CONFIG_TS_AU1X00_ADS7846 is not set # # Serial drivers diff --git a/arch/mips/configs/db1500_defconfig b/arch/mips/configs/db1500_defconfig index 99240668bca..0ad08cf446e 100644 --- a/arch/mips/configs/db1500_defconfig +++ b/arch/mips/configs/db1500_defconfig @@ -811,7 +811,6 @@ CONFIG_SERIO_RAW=m # CONFIG_VT is not set # CONFIG_SERIAL_NONSTANDARD is not set # CONFIG_AU1X00_GPIO is not set -# CONFIG_TS_AU1X00_ADS7846 is not set # # Serial drivers diff --git a/arch/mips/configs/db1550_defconfig b/arch/mips/configs/db1550_defconfig index 19992f76c60..057c7d429c8 100644 --- a/arch/mips/configs/db1550_defconfig +++ b/arch/mips/configs/db1550_defconfig @@ -856,7 +856,6 @@ CONFIG_SERIO_RAW=m # CONFIG_VT is not set # CONFIG_SERIAL_NONSTANDARD is not set # CONFIG_AU1X00_GPIO is not set -# CONFIG_TS_AU1X00_ADS7846 is not set # # Serial drivers diff --git a/arch/mips/configs/pb1100_defconfig b/arch/mips/configs/pb1100_defconfig index d53fa8f8e09..703d28db05b 100644 --- a/arch/mips/configs/pb1100_defconfig +++ b/arch/mips/configs/pb1100_defconfig @@ -731,7 +731,6 @@ CONFIG_HW_CONSOLE=y CONFIG_VT_HW_CONSOLE_BINDING=y # CONFIG_SERIAL_NONSTANDARD is not set # CONFIG_AU1X00_GPIO is not set -# CONFIG_TS_AU1X00_ADS7846 is not set # # Serial drivers diff --git a/arch/mips/configs/pb1500_defconfig b/arch/mips/configs/pb1500_defconfig index dc4aa0c6684..82f0c5cee0d 100644 --- a/arch/mips/configs/pb1500_defconfig +++ b/arch/mips/configs/pb1500_defconfig @@ -849,7 +849,6 @@ CONFIG_SERIO_RAW=m # CONFIG_VT is not set # CONFIG_SERIAL_NONSTANDARD is not set # CONFIG_AU1X00_GPIO is not set -# CONFIG_TS_AU1X00_ADS7846 is not set # # Serial drivers diff --git a/arch/mips/configs/pb1550_defconfig b/arch/mips/configs/pb1550_defconfig index 24428e13002..147a4fc7fdd 100644 --- a/arch/mips/configs/pb1550_defconfig +++ b/arch/mips/configs/pb1550_defconfig @@ -842,7 +842,6 @@ CONFIG_SERIO_RAW=m # CONFIG_VT is not set # CONFIG_SERIAL_NONSTANDARD is not set # CONFIG_AU1X00_GPIO is not set -# CONFIG_TS_AU1X00_ADS7846 is not set # # Serial drivers diff --git a/arch/mips/configs/sb1250-swarm_defconfig b/arch/mips/configs/sb1250-swarm_defconfig index 49dfcef2518..c2798229cbf 100644 --- a/arch/mips/configs/sb1250-swarm_defconfig +++ b/arch/mips/configs/sb1250-swarm_defconfig @@ -468,7 +468,7 @@ CONFIG_BLK_DEV_IDEFLOPPY=y # CONFIG_IDE_GENERIC=y # CONFIG_BLK_DEV_IDEPCI is not set -# CONFIG_BLK_DEV_IDE_SWARM is not set +CONFIG_BLK_DEV_IDE_SWARM=y # CONFIG_IDE_ARM is not set # CONFIG_BLK_DEV_IDEDMA is not set # CONFIG_IDEDMA_AUTO is not set diff --git a/arch/mips/gt64120/wrppmc/time.c b/arch/mips/gt64120/wrppmc/time.c index b207e7f1417..668dbd5f12c 100644 --- a/arch/mips/gt64120/wrppmc/time.c +++ b/arch/mips/gt64120/wrppmc/time.c @@ -19,12 +19,6 @@ #define WRPPMC_CPU_CLK_FREQ 40000000 /* 40MHZ */ -void __init plat_timer_setup(struct irqaction *irq) -{ - /* Install ISR for timer interrupt */ - setup_irq(WRPPMC_MIPS_TIMER_IRQ, irq); -} - /* * Estimate CPU frequency. Sets mips_hpt_frequency as a side-effect * diff --git a/arch/mips/jmr3927/rbhma3100/setup.c b/arch/mips/jmr3927/rbhma3100/setup.c index edb9e59248e..06e01c8f4e3 100644 --- a/arch/mips/jmr3927/rbhma3100/setup.c +++ b/arch/mips/jmr3927/rbhma3100/setup.c @@ -27,17 +27,13 @@ * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org) */ -#include <linux/clockchips.h> #include <linux/init.h> #include <linux/kernel.h> #include <linux/kdev_t.h> #include <linux/types.h> -#include <linux/sched.h> #include <linux/pci.h> #include <linux/ide.h> -#include <linux/irq.h> #include <linux/ioport.h> -#include <linux/param.h> /* for HZ */ #include <linux/delay.h> #include <linux/pm.h> #include <linux/platform_device.h> @@ -48,17 +44,13 @@ #endif #include <asm/addrspace.h> -#include <asm/time.h> +#include <asm/txx9tmr.h> #include <asm/reboot.h> #include <asm/jmr3927/jmr3927.h> #include <asm/mipsregs.h> extern void puts(const char *cp); -/* Tick Timer divider */ -#define JMR3927_TIMER_CCD 0 /* 1/2 */ -#define JMR3927_TIMER_CLK (JMR3927_IMCLK / (2 << JMR3927_TIMER_CCD)) - /* don't enable - see errata */ static int jmr3927_ccfg_toeon; @@ -93,66 +85,12 @@ static void jmr3927_machine_power_off(void) while (1); } -static cycle_t jmr3927_hpt_read(void) -{ - /* We assume this function is called xtime_lock held. */ - return jiffies * (JMR3927_TIMER_CLK / HZ) + jmr3927_tmrptr->trr; -} - -static void jmr3927_set_mode(enum clock_event_mode mode, - struct clock_event_device *evt) -{ - /* Nothing to do here */ -} - -struct clock_event_device jmr3927_clock_event_device = { - .name = "MIPS", - .features = CLOCK_EVT_FEAT_PERIODIC, - .shift = 32, - .rating = 300, - .cpumask = CPU_MASK_CPU0, - .irq = JMR3927_IRQ_TICK, - .set_mode = jmr3927_set_mode, -}; - -static irqreturn_t jmr3927_timer_interrupt(int irq, void *dev_id) -{ - struct clock_event_device *cd = &jmr3927_clock_event_device; - - jmr3927_tmrptr->tisr = 0; /* ack interrupt */ - - cd->event_handler(cd); - - return IRQ_HANDLED; -} - -static struct irqaction jmr3927_timer_irqaction = { - .handler = jmr3927_timer_interrupt, - .flags = IRQF_DISABLED | IRQF_PERCPU, - .name = "jmr3927-timer", -}; - void __init plat_time_init(void) { - struct clock_event_device *cd; - - clocksource_mips.read = jmr3927_hpt_read; - mips_hpt_frequency = JMR3927_TIMER_CLK; - - jmr3927_tmrptr->cpra = JMR3927_TIMER_CLK / HZ; - jmr3927_tmrptr->itmr = TXx927_TMTITMR_TIIE | TXx927_TMTITMR_TZCE; - jmr3927_tmrptr->ccdr = JMR3927_TIMER_CCD; - jmr3927_tmrptr->tcr = - TXx927_TMTCR_TCE | TXx927_TMTCR_CCDE | TXx927_TMTCR_TMODE_ITVL; - - cd = &jmr3927_clock_event_device; - /* Calculate the min / max delta */ - cd->mult = div_sc((unsigned long) JMR3927_IMCLK, NSEC_PER_SEC, 32); - cd->max_delta_ns = clockevent_delta2ns(0x7fffffff, cd); - cd->min_delta_ns = clockevent_delta2ns(0x300, cd); - clockevents_register_device(cd); - - setup_irq(JMR3927_IRQ_TICK, &jmr3927_timer_irqaction); + txx9_clockevent_init(TX3927_TMR_REG(0), + TXX9_IRQ_BASE + JMR3927_IRQ_IRC_TMR(0), + JMR3927_IMCLK); + txx9_clocksource_init(TX3927_TMR_REG(1), JMR3927_IMCLK); } #define DO_WRITE_THROUGH @@ -317,15 +255,8 @@ static void __init tx3927_setup(void) tx3927_ccfgptr->ccfg, tx3927_ccfgptr->pcfg); /* TMR */ - /* disable all timers */ - for (i = 0; i < TX3927_NR_TMR; i++) { - tx3927_tmrptr(i)->tcr = TXx927_TMTCR_CRE; - tx3927_tmrptr(i)->tisr = 0; - tx3927_tmrptr(i)->cpra = 0xffffffff; - tx3927_tmrptr(i)->itmr = 0; - tx3927_tmrptr(i)->ccdr = 0; - tx3927_tmrptr(i)->pgmr = 0; - } + for (i = 0; i < TX3927_NR_TMR; i++) + txx9_tmr_init(TX3927_TMR_REG(i)); /* DMA */ tx3927_dmaptr->mcr = 0; diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index d7745c8976f..3196509a28d 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile @@ -10,6 +10,7 @@ obj-y += cpu-probe.o branch.o entry.o genex.o irq.o process.o \ obj-$(CONFIG_CEVT_R4K) += cevt-r4k.o obj-$(CONFIG_CEVT_GT641XX) += cevt-gt641xx.o +obj-$(CONFIG_CEVT_TXX9) += cevt-txx9.o binfmt_irix-objs := irixelf.o irixinv.o irixioctl.o irixsig.o \ irix5sys.o sysirix.o diff --git a/arch/mips/kernel/cevt-gt641xx.c b/arch/mips/kernel/cevt-gt641xx.c index 4c651b2680f..c36772631fe 100644 --- a/arch/mips/kernel/cevt-gt641xx.c +++ b/arch/mips/kernel/cevt-gt641xx.c @@ -49,10 +49,9 @@ int gt641xx_timer0_state(void) static int gt641xx_timer0_set_next_event(unsigned long delta, struct clock_event_device *evt) { - unsigned long flags; u32 ctrl; - spin_lock_irqsave(>641xx_timer_lock, flags); + spin_lock(>641xx_timer_lock); ctrl = GT_READ(GT_TC_CONTROL_OFS); ctrl &= ~(GT_TC_CONTROL_ENTC0_MSK | GT_TC_CONTROL_SELTC0_MSK); @@ -61,7 +60,7 @@ static int gt641xx_timer0_set_next_event(unsigned long delta, GT_WRITE(GT_TC0_OFS, delta); GT_WRITE(GT_TC_CONTROL_OFS, ctrl); - spin_unlock_irqrestore(>641xx_timer_lock, flags); + spin_unlock(>641xx_timer_lock); return 0; } @@ -69,10 +68,9 @@ static int gt641xx_timer0_set_next_event(unsigned long delta, static void gt641xx_timer0_set_mode(enum clock_event_mode mode, struct clock_event_device *evt) { - unsigned long flags; u32 ctrl; - spin_lock_irqsave(>641xx_timer_lock, flags); + spin_lock(>641xx_timer_lock); ctrl = GT_READ(GT_TC_CONTROL_OFS); ctrl &= ~(GT_TC_CONTROL_ENTC0_MSK | GT_TC_CONTROL_SELTC0_MSK); @@ -90,7 +88,7 @@ static void gt641xx_timer0_set_mode(enum clock_event_mode mode, GT_WRITE(GT_TC_CONTROL_OFS, ctrl); - spin_unlock_irqrestore(>641xx_timer_lock, flags); + spin_unlock(>641xx_timer_lock); } static void gt641xx_timer0_event_handler(struct clock_event_device *dev) @@ -133,9 +131,9 @@ static int __init gt641xx_timer0_clockevent_init(void) cd = >641xx_timer0_clockevent; cd->rating = 200 + gt641xx_base_clock / 10000000; + clockevent_set_clock(cd, gt641xx_base_clock); cd->max_delta_ns = clockevent_delta2ns(0x7fffffff, cd); cd->min_delta_ns = clockevent_delta2ns(0x300, cd); - clockevent_set_clock(cd, gt641xx_base_clock); clockevents_register_device(>641xx_timer0_clockevent); diff --git a/arch/mips/kernel/cevt-r4k.c b/arch/mips/kernel/cevt-r4k.c index ae2984fff58..bab935a3d74 100644 --- a/arch/mips/kernel/cevt-r4k.c +++ b/arch/mips/kernel/cevt-r4k.c @@ -28,7 +28,7 @@ static int mips_next_event(unsigned long delta, cnt = read_c0_count(); cnt += delta; write_c0_compare(cnt); - res = ((long)(read_c0_count() - cnt ) > 0) ? -ETIME : 0; + res = ((int)(read_c0_count() - cnt) > 0) ? -ETIME : 0; #ifdef CONFIG_MIPS_MT_SMTC evpe(vpflags); local_irq_restore(flags); @@ -179,7 +179,7 @@ static int c0_compare_int_pending(void) static int c0_compare_int_usable(void) { - const unsigned int delta = 0x300000; + unsigned int delta; unsigned int cnt; /* @@ -192,11 +192,17 @@ static int c0_compare_int_usable(void) return 0; } - cnt = read_c0_count(); - cnt += delta; - write_c0_compare(cnt); + for (delta = 0x10; delta <= 0x400000; delta <<= 1) { + cnt = read_c0_count(); + cnt += delta; + write_c0_compare(cnt); + irq_disable_hazard(); + if ((int)(read_c0_count() - cnt) < 0) + break; + /* increase delta if the timer was already expired */ + } - while ((long)(read_c0_count() - cnt) <= 0) + while ((int)(re |