diff options
author | Will Deacon <will.deacon@arm.com> | 2012-08-10 19:13:36 +0100 |
---|---|---|
committer | Ben Hutchings <ben@decadent.org.uk> | 2012-09-12 03:36:57 +0100 |
commit | 8786ed5f8a0dbd6fea585ce69fdd9b840388e458 (patch) | |
tree | ff2a9798a1c74ea616a461fca8e9f90aca585563 /arch | |
parent | 775152296f2a750ebefc58d35fe0479a679f6797 (diff) |
ARM: 7489/1: errata: fix workaround for erratum #720789 on UP systems
commit 730a8128cd8978467eb1cf546b11014acb57d433 upstream.
Commit 5a783cbc4836 ("ARM: 7478/1: errata: extend workaround for erratum
#720789") added workarounds for erratum #720789 to the range TLB
invalidation functions with the observation that the erratum only
affects SMP platforms. However, when running an SMP_ON_UP kernel on a
uniprocessor platform we must take care to preserve the ASID as the
workaround is not required.
This patch ensures that we don't set the ASID to 0 when flushing the TLB
on such a system, preserving the original behaviour with the workaround
disabled.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mm/tlb-v7.S | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mm/tlb-v7.S b/arch/arm/mm/tlb-v7.S index c2021139cb5..ea94765acf9 100644 --- a/arch/arm/mm/tlb-v7.S +++ b/arch/arm/mm/tlb-v7.S @@ -38,10 +38,10 @@ ENTRY(v7wbi_flush_user_tlb_range) dsb mov r0, r0, lsr #PAGE_SHIFT @ align address mov r1, r1, lsr #PAGE_SHIFT -#ifdef CONFIG_ARM_ERRATA_720789 - mov r3, #0 -#else asid r3, r3 @ mask ASID +#ifdef CONFIG_ARM_ERRATA_720789 + ALT_SMP(W(mov) r3, #0 ) + ALT_UP(W(nop) ) #endif orr r0, r3, r0, lsl #PAGE_SHIFT @ Create initial MVA mov r1, r1, lsl #PAGE_SHIFT |