diff options
| author | Frank Li <Frank.Li@freescale.com> | 2012-10-30 18:24:57 +0000 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2012-11-01 12:28:05 -0400 |
| commit | 7629838ca33adf8d576d9e4a9d31df4f3b3bc258 (patch) | |
| tree | da1ad5e7abea5c73707fead5429932671c219079 /arch | |
| parent | 405f257f46f66a800639532afd1dd8dfd5fa4861 (diff) | |
ARM: dts: imx6q: Add ENET PTP clock pin and clock source
Add ENET 1588 clock input pin
MX6Q_PAD_GPIO_16__ENET_ANATOP_ETHERNET_REF_OUT
and anatop PLL8 clock source for ENET
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/imx6q.dtsi | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index f3990b04fec..3290e61be3e 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -580,6 +580,7 @@ 66 0x1b0b0 /* MX6Q_PAD_RGMII_RD2__ENET_RGMII_RD2 */ 70 0x1b0b0 /* MX6Q_PAD_RGMII_RD3__ENET_RGMII_RD3 */ 48 0x1b0b0 /* MX6Q_PAD_RGMII_RX_CTL__RGMII_RX_CTL */ + 1033 0x4001b0a8 /* MX6Q_PAD_GPIO_16__ENET_ANATOP_ETHERNET_REF_OUT*/ >; }; @@ -833,8 +834,8 @@ compatible = "fsl,imx6q-fec"; reg = <0x02188000 0x4000>; interrupts = <0 118 0x04 0 119 0x04>; - clocks = <&clks 117>, <&clks 117>; - clock-names = "ipg", "ahb"; + clocks = <&clks 117>, <&clks 117>, <&clks 177>; + clock-names = "ipg", "ahb", "ptp"; status = "disabled"; }; |