aboutsummaryrefslogtreecommitdiff
path: root/arch
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2011-06-20 20:11:34 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2011-06-20 20:11:34 -0700
commit85d45adef06caa988506686527a5fedf856dc550 (patch)
tree8f7bdc8337639b7317a11edddb3dd291e60748d3 /arch
parenteda0841094a3a232357ca10a24b40da461db3fcf (diff)
parentfdb9c3cd5124c9a6e4c824ed2bca5b4602e84a1a (diff)
Merge branch 'msm-fix' of git://codeaurora.org/quic/kernel/davidb/linux-msm
* 'msm-fix' of git://codeaurora.org/quic/kernel/davidb/linux-msm: msm: timer: Fix DGT rate on 8960 and 8660 msm: timer: compensate for timer shift in msm_read_timer_count msm: timer: Fix SMP build error
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-msm/timer.c14
1 files changed, 11 insertions, 3 deletions
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index 38b95e949d1..63621f152c9 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -23,6 +23,8 @@
#include <linux/io.h>
#include <asm/mach/time.h>
+#include <asm/hardware/gic.h>
+
#include <mach/msm_iomap.h>
#include <mach/cpu.h>
@@ -55,10 +57,12 @@ enum timer_location {
#if defined(CONFIG_ARCH_QSD8X50)
#define DGT_HZ (19200000 / 4) /* 19.2 MHz / 4 by default */
#define MSM_DGT_SHIFT (0)
-#elif defined(CONFIG_ARCH_MSM7X30) || defined(CONFIG_ARCH_MSM8X60) || \
- defined(CONFIG_ARCH_MSM8960)
+#elif defined(CONFIG_ARCH_MSM7X30)
#define DGT_HZ (24576000 / 4) /* 24.576 MHz (LPXO) / 4 by default */
#define MSM_DGT_SHIFT (0)
+#elif defined(CONFIG_ARCH_MSM8X60) || defined(CONFIG_ARCH_MSM8960)
+#define DGT_HZ (27000000 / 4) /* 27 MHz (PXO) / 4 by default */
+#define MSM_DGT_SHIFT (0)
#else
#define DGT_HZ 19200000 /* 19.2 MHz or 600 KHz after shift */
#define MSM_DGT_SHIFT (5)
@@ -100,7 +104,11 @@ static cycle_t msm_read_timer_count(struct clocksource *cs)
{
struct msm_clock *clk = container_of(cs, struct msm_clock, clocksource);
- return readl(clk->global_counter);
+ /*
+ * Shift timer count down by a constant due to unreliable lower bits
+ * on some targets.
+ */
+ return readl(clk->global_counter) >> clk->shift;
}
static struct msm_clock *clockevent_to_clock(struct clock_event_device *evt)