diff options
author | Chris Zankel <czankel@tensilica.com> | 2005-06-23 22:01:12 -0700 |
---|---|---|
committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-06-24 00:05:21 -0700 |
commit | 4bedea94545165364618d403d03b61d797acba0b (patch) | |
tree | 04626bb71e0fb5ea5c5d5aa4fedc813301bea6a6 /arch/xtensa/boot/boot-elf/boot.ld | |
parent | 8e1a6dd2fddcc73c9e933758361e3d9c076c688a (diff) |
[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 2
The attached patches provides part 2 of an architecture implementation for the
Tensilica Xtensa CPU series.
Signed-off-by: Chris Zankel <chris@zankel.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/xtensa/boot/boot-elf/boot.ld')
-rw-r--r-- | arch/xtensa/boot/boot-elf/boot.ld | 71 |
1 files changed, 71 insertions, 0 deletions
diff --git a/arch/xtensa/boot/boot-elf/boot.ld b/arch/xtensa/boot/boot-elf/boot.ld new file mode 100644 index 00000000000..4ab06a0a7a6 --- /dev/null +++ b/arch/xtensa/boot/boot-elf/boot.ld @@ -0,0 +1,71 @@ +OUTPUT_ARCH(xtensa) + +SECTIONS +{ + .start 0xD0000000 : { *(.start) } + + .text 0xD0000000: + { + __reloc_start = . ; + _text_start = . ; + *(.literal .text.literal .text) + _text_end = . ; + } + + .rodata ALIGN(0x04): + { + *(.rodata) + *(.rodata1) + } + + .data ALIGN(0x04): + { + *(.data) + *(.data1) + *(.sdata) + *(.sdata2) + *(.got.plt) + *(.got) + *(.dynamic) + } + + __reloc_end = . ; + + .initrd ALIGN(0x10) : + { + boot_initrd_start = . ; + *(.initrd) + boot_initrd_end = .; + } + + . = ALIGN(0x10); + __image_load = . ; + .image 0xd0001000: + { + _image_start = .; + *(image) + . = (. + 3) & ~ 3; + _image_end = . ; + } + + + .bss ((LOADADDR(.image) + SIZEOF(.image) + 3) & ~ 3): + { + __bss_start = .; + *(.sbss) + *(.scommon) + *(.dynbss) + *(.bss) + __bss_end = .; + } + _end = .; + _param_start = .; + + .ResetVector.text 0xfe000020 : + { + *(.ResetVector.text) + } + + + PROVIDE (end = .); +} |