diff options
author | Robert Richter <robert.richter@amd.com> | 2010-02-25 19:43:07 +0100 |
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committer | Robert Richter <robert.richter@amd.com> | 2010-03-01 11:23:15 +0100 |
commit | a163b1099dc7016704043c7fc572ae42519f08f7 (patch) | |
tree | 3ef749366e7a8a3bf94468ff7230f701fa2a49c8 /arch/x86/include/asm/perf_event.h | |
parent | 1d6040f17d12a65b9f7ab4cb9fd6d721206b79ec (diff) |
perf, x86: add some IBS macros to perf_event.h
Signed-off-by: Robert Richter <robert.richter@amd.com>
Diffstat (limited to 'arch/x86/include/asm/perf_event.h')
-rw-r--r-- | arch/x86/include/asm/perf_event.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h index 4933ccde96c..c7f60e1297a 100644 --- a/arch/x86/include/asm/perf_event.h +++ b/arch/x86/include/asm/perf_event.h @@ -121,12 +121,14 @@ union cpuid10_edx { #define IBS_FETCH_RAND_EN (1ULL<<57) #define IBS_FETCH_VAL (1ULL<<49) #define IBS_FETCH_ENABLE (1ULL<<48) -#define IBS_FETCH_CNT_MASK 0xFFFF0000ULL +#define IBS_FETCH_CNT 0xFFFF0000ULL +#define IBS_FETCH_MAX_CNT 0x0000FFFFULL /* IbsOpCtl bits */ #define IBS_OP_CNT_CTL (1ULL<<19) #define IBS_OP_VAL (1ULL<<18) #define IBS_OP_ENABLE (1ULL<<17) +#define IBS_OP_MAX_CNT 0x0000FFFFULL #ifdef CONFIG_PERF_EVENTS extern void init_hw_perf_events(void); |