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authorAndi Kleen <ak@linux.intel.com>2009-04-28 23:32:56 +0200
committerH. Peter Anvin <hpa@zytor.com>2009-05-28 09:24:13 -0700
commit7856f6cce4a8cda8c1f94b99605c07d16b8d8dec (patch)
tree71415ceae2ffb1ca97ad82027e0a26024cc89b67 /arch/x86/include/asm/irq_vectors.h
parent45f458e9a8a216b02b76fe61d9e8bc40d659fbe8 (diff)
x86, mce: enable MCE_INTEL for 32bit new MCE
Enable the 64bit MCE_INTEL code (CMCI, thermal interrupts) for 32bit NEW_MCE. Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch/x86/include/asm/irq_vectors.h')
-rw-r--r--arch/x86/include/asm/irq_vectors.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/x86/include/asm/irq_vectors.h b/arch/x86/include/asm/irq_vectors.h
index 3cbd79bbb47..451e24d1805 100644
--- a/arch/x86/include/asm/irq_vectors.h
+++ b/arch/x86/include/asm/irq_vectors.h
@@ -87,10 +87,11 @@
#define CALL_FUNCTION_SINGLE_VECTOR 0xfb
#define THERMAL_APIC_VECTOR 0xfa
+#define THRESHOLD_APIC_VECTOR 0xf9
+
#ifdef CONFIG_X86_32
-/* 0xf8 - 0xf9 : free */
+/* 0xf9 : free */
#else
-# define THRESHOLD_APIC_VECTOR 0xf9
# define UV_BAU_MESSAGE 0xf8
#endif