arch/tile: Shrink the tile-opcode files considerably.

The C file (tile-desc_{32,64}.c) was about 300KB before this change,
and is now shrunk down to 100K.  The original file included support
for BFD in the binutils toolchain, which is not necessary in the
kernel; the kernel version only needs to include enough support to
enable the single-stepper and backtracer.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>

1 files changed, 1015 insertions, 12343 deletions

diff --git a/arch/tile/kernel/tile-desc_32.c b/arch/tile/kernel/tile-desc_32.c
index 3b78369f86b..69af0e150f7 100644
--- a/arch/tile/kernel/tile-desc_32.c
+++ b/arch/tile/kernel/tile-desc_32.c
@@ -1,12 +1,5 @@
-/* Define to include "bfd.h" and get actual BFD relocations below. */
-/* #define WANT_BFD_RELOCS */
-
-#ifdef WANT_BFD_RELOCS
-#include "bfd.h"
-#define MAYBE_BFD_RELOC(X) (X)
-#else
-#define MAYBE_BFD_RELOC(X) -1
-#endif
+/* This define is BFD_RELOC_##x for real bfd, or -1 for everyone else. */
+#define BFD_RELOC(x) -1
 
 /* Special registers. */
 #define TREG_LR 55
@@ -16,11014 +9,1193 @@
 /* FIXME: Rename this. */
 #include <asm/opcode-tile.h>
 
+#include <linux/stddef.h>
 
-const struct tile_opcode tile_opcodes[394] =
+const struct tile_opcode tile_opcodes[395] =
 {
- { "bpt", TILE_OPC_BPT, 0x2 /* pipes */, 0 /* num_operands */,
-    TREG_ZERO, /* implicitly_written_register */
-    0, /* can_bundle */
-    {
-      /* operands */
-      { 0, },
-      {  },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0ULL,
-      0xfbffffff80000000ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      -1ULL,
-      0x400b3cae00000000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+ { "bpt", TILE_OPC_BPT, 0x2, 0, TREG_ZERO, 0,
+    { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
   },
-  { "info", TILE_OPC_INFO, 0xf /* pipes */, 1 /* num_operands */,
-    TREG_ZERO, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 0 },
-      { 1 },
-      { 2 },
-      { 3 },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x800000007ff00fffULL,
-      0xfff807ff80000000ULL,
-      0x8000000078000fffULL,
-      0xf80007ff80000000ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000050100fffULL,
-      0x302007ff80000000ULL,
-      0x8000000050000fffULL,
-      0xc00007ff80000000ULL,
-      -1ULL
-    }
+  { "info", TILE_OPC_INFO, 0xf, 1, TREG_ZERO, 1,
+    { { 0 }, { 1 }, { 2 }, { 3 }, { 0, } },
   },
-  { "infol", TILE_OPC_INFOL, 0x3 /* pipes */, 1 /* num_operands */,
-    TREG_ZERO, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 4 },
-      { 5 },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x8000000070000fffULL,
-      0xf80007ff80000000ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000030000fffULL,
-      0x200007ff80000000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+  { "infol", TILE_OPC_INFOL, 0x3, 1, TREG_ZERO, 1,
+    { { 4 }, { 5 }, { 0, }, { 0, }, { 0, } },
   },
-  { "j", TILE_OPC_J, 0x2 /* pipes */, 1 /* num_operands */,
-    TREG_ZERO, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 0, },
-      { 6 },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0ULL,
-      0xf000000000000000ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      -1ULL,
-      0x5000000000000000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+  { "j", TILE_OPC_J, 0x2, 1, TREG_ZERO, 1,
+    { { 0, }, { 6 }, { 0, }, { 0, }, { 0, } },
   },
-  { "jal", TILE_OPC_JAL, 0x2 /* pipes */, 1 /* num_operands */,
-    TREG_LR, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 0, },
-      { 6 },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0ULL,
-      0xf000000000000000ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      -1ULL,
-      0x6000000000000000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+  { "jal", TILE_OPC_JAL, 0x2, 1, TREG_LR, 1,
+    { { 0, }, { 6 }, { 0, }, { 0, }, { 0, } },
   },
-  { "move", TILE_OPC_MOVE, 0xf /* pipes */, 2 /* num_operands */,
-    TREG_ZERO, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 8 },
-      { 9, 10 },
-      { 11, 12 },
-      { 13, 14 },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x800000007ffff000ULL,
-      0xfffff80000000000ULL,
-      0x80000000780ff000ULL,
-      0xf807f80000000000ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000000cff000ULL,
-      0x0833f80000000000ULL,
-      0x80000000180bf000ULL,
-      0x9805f80000000000ULL,
-      -1ULL
-    }
+  { "move", TILE_OPC_MOVE, 0xf, 2, TREG_ZERO, 1,
+    { { 7, 8 }, { 9, 10 }, { 11, 12 }, { 13, 14 }, { 0, } },
   },
-  { "move.sn", TILE_OPC_MOVE_SN, 0x3 /* pipes */, 2 /* num_operands */,
-    TREG_SN, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 8 },
-      { 9, 10 },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x800000007ffff000ULL,
-      0xfffff80000000000ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000008cff000ULL,
-      0x0c33f80000000000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+  { "move.sn", TILE_OPC_MOVE_SN, 0x3, 2, TREG_SN, 1,
+    { { 7, 8 }, { 9, 10 }, { 0, }, { 0, }, { 0, } },
   },
-  { "movei", TILE_OPC_MOVEI, 0xf /* pipes */, 2 /* num_operands */,
-    TREG_ZERO, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 0 },
-      { 9, 1 },
-      { 11, 2 },
-      { 13, 3 },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x800000007ff00fc0ULL,
-      0xfff807e000000000ULL,
-      0x8000000078000fc0ULL,
-      0xf80007e000000000ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000040800fc0ULL,
-      0x305807e000000000ULL,
-      0x8000000058000fc0ULL,
-      0xc80007e000000000ULL,
-      -1ULL
-    }
+  { "movei", TILE_OPC_MOVEI, 0xf, 2, TREG_ZERO, 1,
+    { { 7, 0 }, { 9, 1 }, { 11, 2 }, { 13, 3 }, { 0, } },
   },
-  { "movei.sn", TILE_OPC_MOVEI_SN, 0x3 /* pipes */, 2 /* num_operands */,
-    TREG_SN, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 0 },
-      { 9, 1 },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x800000007ff00fc0ULL,
-      0xfff807e000000000ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000048800fc0ULL,
-      0x345807e000000000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+  { "movei.sn", TILE_OPC_MOVEI_SN, 0x3, 2, TREG_SN, 1,
+    { { 7, 0 }, { 9, 1 }, { 0, }, { 0, }, { 0, } },
   },
-  { "moveli", TILE_OPC_MOVELI, 0x3 /* pipes */, 2 /* num_operands */,
-    TREG_ZERO, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 4 },
-      { 9, 5 },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x8000000070000fc0ULL,
-      0xf80007e000000000ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000020000fc0ULL,
-      0x180007e000000000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+  { "moveli", TILE_OPC_MOVELI, 0x3, 2, TREG_ZERO, 1,
+    { { 7, 4 }, { 9, 5 }, { 0, }, { 0, }, { 0, } },
   },
-  { "moveli.sn", TILE_OPC_MOVELI_SN, 0x3 /* pipes */, 2 /* num_operands */,
-    TREG_SN, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 4 },
-      { 9, 5 },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x8000000070000fc0ULL,
-      0xf80007e000000000ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000010000fc0ULL,
-      0x100007e000000000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+  { "moveli.sn", TILE_OPC_MOVELI_SN, 0x3, 2, TREG_SN, 1,
+    { { 7, 4 }, { 9, 5 }, { 0, }, { 0, }, { 0, } },
   },
-  { "movelis", TILE_OPC_MOVELIS, 0x3 /* pipes */, 2 /* num_operands */,
-    TREG_SN, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 4 },
-      { 9, 5 },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x8000000070000fc0ULL,
-      0xf80007e000000000ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000010000fc0ULL,
-      0x100007e000000000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+  { "movelis", TILE_OPC_MOVELIS, 0x3, 2, TREG_SN, 1,
+    { { 7, 4 }, { 9, 5 }, { 0, }, { 0, }, { 0, } },
   },
-  { "prefetch", TILE_OPC_PREFETCH, 0x12 /* pipes */, 1 /* num_operands */,
-    TREG_ZERO, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 0, },
-      { 10 },
-      { 0, },
-      { 0, },
-      { 15 }
-    },
-    {
-      /* fixed_bit_masks */
-      0ULL,
-      0xfffff81f80000000ULL,
-      0ULL,
-      0ULL,
-      0x8700000003f00000ULL
-    },
-    {
-      /* fixed_bit_values */
-      -1ULL,
-      0x400b501f80000000ULL,
-      -1ULL,
-      -1ULL,
-      0x8000000003f00000ULL
-    }
+  { "prefetch", TILE_OPC_PREFETCH, 0x12, 1, TREG_ZERO, 1,
+    { { 0, }, { 10 }, { 0, }, { 0, }, { 15 } },
   },
-  { "add", TILE_OPC_ADD, 0xf /* pipes */, 3 /* num_operands */,
-    TREG_ZERO, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 8, 16 },
-      { 9, 10, 17 },
-      { 11, 12, 18 },
-      { 13, 14, 19 },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x800000007ffc0000ULL,
-      0xfffe000000000000ULL,
-      0x80000000780c0000ULL,
-      0xf806000000000000ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x00000000000c0000ULL,
-      0x0806000000000000ULL,
-      0x8000000008000000ULL,
-      0x8800000000000000ULL,
-      -1ULL
-    }
+  { "raise", TILE_OPC_RAISE, 0x2, 0, TREG_ZERO, 1,
+    { { 0, }, {  }, { 0, }, { 0, }, { 0, } },
   },
-  { "add.sn", TILE_OPC_ADD_SN, 0x3 /* pipes */, 3 /* num_operands */,
-    TREG_SN, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 8, 16 },
-      { 9, 10, 17 },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x800000007ffc0000ULL,
-      0xfffe000000000000ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x00000000080c0000ULL,
-      0x0c06000000000000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+  { "add", TILE_OPC_ADD, 0xf, 3, TREG_ZERO, 1,
+    { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } },
   },
-  { "addb", TILE_OPC_ADDB, 0x3 /* pipes */, 3 /* num_operands */,
-    TREG_ZERO, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 8, 16 },
-      { 9, 10, 17 },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x800000007ffc0000ULL,
-      0xfffe000000000000ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000000040000ULL,
-      0x0802000000000000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+  { "add.sn", TILE_OPC_ADD_SN, 0x3, 3, TREG_SN, 1,
+    { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } },
   },
-  { "addb.sn", TILE_OPC_ADDB_SN, 0x3 /* pipes */, 3 /* num_operands */,
-    TREG_SN, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 8, 16 },
-      { 9, 10, 17 },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x800000007ffc0000ULL,
-      0xfffe000000000000ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000008040000ULL,
-      0x0c02000000000000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+  { "addb", TILE_OPC_ADDB, 0x3, 3, TREG_ZERO, 1,
+    { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } },
   },
-  { "addbs_u", TILE_OPC_ADDBS_U, 0x3 /* pipes */, 3 /* num_operands */,
-    TREG_ZERO, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 8, 16 },
-      { 9, 10, 17 },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x800000007ffc0000ULL,
-      0xfffe000000000000ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000001880000ULL,
-      0x0888000000000000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+  { "addb.sn", TILE_OPC_ADDB_SN, 0x3, 3, TREG_SN, 1,
+    { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } },
   },
-  { "addbs_u.sn", TILE_OPC_ADDBS_U_SN, 0x3 /* pipes */, 3 /* num_operands */,
-    TREG_SN, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 8, 16 },
-      { 9, 10, 17 },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x800000007ffc0000ULL,
-      0xfffe000000000000ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000009880000ULL,
-      0x0c88000000000000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+  { "addbs_u", TILE_OPC_ADDBS_U, 0x3, 3, TREG_ZERO, 1,
+    { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } },
   },
-  { "addh", TILE_OPC_ADDH, 0x3 /* pipes */, 3 /* num_operands */,
-    TREG_ZERO, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 8, 16 },
-      { 9, 10, 17 },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x800000007ffc0000ULL,
-      0xfffe000000000000ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000000080000ULL,
-      0x0804000000000000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+  { "addbs_u.sn", TILE_OPC_ADDBS_U_SN, 0x3, 3, TREG_SN, 1,
+    { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } },
   },
-  { "addh.sn", TILE_OPC_ADDH_SN, 0x3 /* pipes */, 3 /* num_operands */,
-    TREG_SN, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 8, 16 },
-      { 9, 10, 17 },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x800000007ffc0000ULL,
-      0xfffe000000000000ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000008080000ULL,
-      0x0c04000000000000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+  { "addh", TILE_OPC_ADDH, 0x3, 3, TREG_ZERO, 1,
+    { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } },
   },
-  { "addhs", TILE_OPC_ADDHS, 0x3 /* pipes */, 3 /* num_operands */,
-    TREG_ZERO, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 8, 16 },
-      { 9, 10, 17 },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x800000007ffc0000ULL,
-      0xfffe000000000000ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x00000000018c0000ULL,
-      0x088a000000000000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+  { "addh.sn", TILE_OPC_ADDH_SN, 0x3, 3, TREG_SN, 1,
+    { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } },
   },
-  { "addhs.sn", TILE_OPC_ADDHS_SN, 0x3 /* pipes */, 3 /* num_operands */,
-    TREG_SN, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 8, 16 },
-      { 9, 10, 17 },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x800000007ffc0000ULL,
-      0xfffe000000000000ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x00000000098c0000ULL,
-      0x0c8a000000000000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+  { "addhs", TILE_OPC_ADDHS, 0x3, 3, TREG_ZERO, 1,
+    { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } },
   },
-  { "addi", TILE_OPC_ADDI, 0xf /* pipes */, 3 /* num_operands */,
-    TREG_ZERO, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 8, 0 },
-      { 9, 10, 1 },
-      { 11, 12, 2 },
-      { 13, 14, 3 },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x800000007ff00000ULL,
-      0xfff8000000000000ULL,
-      0x8000000078000000ULL,
-      0xf800000000000000ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000040300000ULL,
-      0x3018000000000000ULL,
-      0x8000000048000000ULL,
-      0xb800000000000000ULL,
-      -1ULL
-    }
+  { "addhs.sn", TILE_OPC_ADDHS_SN, 0x3, 3, TREG_SN, 1,
+    { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } },
   },
-  { "addi.sn", TILE_OPC_ADDI_SN, 0x3 /* pipes */, 3 /* num_operands */,
-    TREG_SN, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 8, 0 },
-      { 9, 10, 1 },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x800000007ff00000ULL,
-      0xfff8000000000000ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000048300000ULL,
-      0x3418000000000000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+  { "addi", TILE_OPC_ADDI, 0xf, 3, TREG_ZERO, 1,
+    { { 7, 8, 0 }, { 9, 10, 1 }, { 11, 12, 2 }, { 13, 14, 3 }, { 0, } },
   },
-  { "addib", TILE_OPC_ADDIB, 0x3 /* pipes */, 3 /* num_operands */,
-    TREG_ZERO, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 8, 0 },
-      { 9, 10, 1 },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x800000007ff00000ULL,
-      0xfff8000000000000ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000040100000ULL,
-      0x3008000000000000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+  { "addi.sn", TILE_OPC_ADDI_SN, 0x3, 3, TREG_SN, 1,
+    { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } },
   },
-  { "addib.sn", TILE_OPC_ADDIB_SN, 0x3 /* pipes */, 3 /* num_operands */,
-    TREG_SN, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 8, 0 },
-      { 9, 10, 1 },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x800000007ff00000ULL,
-      0xfff8000000000000ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000048100000ULL,
-      0x3408000000000000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+  { "addib", TILE_OPC_ADDIB, 0x3, 3, TREG_ZERO, 1,
+    { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } },
   },
-  { "addih", TILE_OPC_ADDIH, 0x3 /* pipes */, 3 /* num_operands */,
-    TREG_ZERO, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 8, 0 },
-      { 9, 10, 1 },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x800000007ff00000ULL,
-      0xfff8000000000000ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000040200000ULL,
-      0x3010000000000000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+  { "addib.sn", TILE_OPC_ADDIB_SN, 0x3, 3, TREG_SN, 1,
+    { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } },
   },
-  { "addih.sn", TILE_OPC_ADDIH_SN, 0x3 /* pipes */, 3 /* num_operands */,
-    TREG_SN, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 8, 0 },
-      { 9, 10, 1 },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x800000007ff00000ULL,
-      0xfff8000000000000ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000048200000ULL,
-      0x3410000000000000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+  { "addih", TILE_OPC_ADDIH, 0x3, 3, TREG_ZERO, 1,
+    { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } },
   },
-  { "addli", TILE_OPC_ADDLI, 0x3 /* pipes */, 3 /* num_operands */,
-    TREG_ZERO, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 8, 4 },
-      { 9, 10, 5 },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x8000000070000000ULL,
-      0xf800000000000000ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000020000000ULL,
-      0x1800000000000000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+  { "addih.sn", TILE_OPC_ADDIH_SN, 0x3, 3, TREG_SN, 1,
+    { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } },
   },
-  { "addli.sn", TILE_OPC_ADDLI_SN, 0x3 /* pipes */, 3 /* num_operands */,
-    TREG_SN, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 8, 4 },
-      { 9, 10, 5 },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x8000000070000000ULL,
-      0xf800000000000000ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000010000000ULL,
-      0x1000000000000000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+  { "addli", TILE_OPC_ADDLI, 0x3, 3, TREG_ZERO, 1,
+    { { 7, 8, 4 }, { 9, 10, 5 }, { 0, }, { 0, }, { 0, } },
   },
-  { "addlis", TILE_OPC_ADDLIS, 0x3 /* pipes */, 3 /* num_operands */,
-    TREG_SN, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 8, 4 },
-      { 9, 10, 5 },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x8000000070000000ULL,
-      0xf800000000000000ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000010000000ULL,
-      0x1000000000000000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+  { "addli.sn", TILE_OPC_ADDLI_SN, 0x3, 3, TREG_SN, 1,
+    { { 7, 8, 4 }, { 9, 10, 5 }, { 0, }, { 0, }, { 0, } },
   },
-  { "adds", TILE_OPC_ADDS, 0x3 /* pipes */, 3 /* num_operands */,
-    TREG_ZERO, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 8, 16 },
-      { 9, 10, 17 },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x800000007ffc0000ULL,
-      0xfffe000000000000ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000001800000ULL,
-      0x0884000000000000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+  { "addlis", TILE_OPC_ADDLIS, 0x3, 3, TREG_SN, 1,
+    { { 7, 8, 4 }, { 9, 10, 5 }, { 0, }, { 0, }, { 0, } },
   },
-  { "adds.sn", TILE_OPC_ADDS_SN, 0x3 /* pipes */, 3 /* num_operands */,
-    TREG_SN, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 8, 16 },
-      { 9, 10, 17 },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x800000007ffc0000ULL,
-      0xfffe000000000000ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000009800000ULL,
-      0x0c84000000000000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+  { "adds", TILE_OPC_ADDS, 0x3, 3, TREG_ZERO, 1,
+    { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } },
   },
-  { "adiffb_u", TILE_OPC_ADIFFB_U, 0x1 /* pipes */, 3 /* num_operands */,
-    TREG_ZERO, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 8, 16 },
-      { 0, },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x800000007ffc0000ULL,
-      0ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000000100000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+  { "adds.sn", TILE_OPC_ADDS_SN, 0x3, 3, TREG_SN, 1,
+    { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } },
   },
-  { "adiffb_u.sn", TILE_OPC_ADIFFB_U_SN, 0x1 /* pipes */, 3 /* num_operands */,
-    TREG_SN, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 8, 16 },
-      { 0, },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x800000007ffc0000ULL,
-      0ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000008100000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+  { "adiffb_u", TILE_OPC_ADIFFB_U, 0x1, 3, TREG_ZERO, 1,
+    { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   },
-  { "adiffh", TILE_OPC_ADIFFH, 0x1 /* pipes */, 3 /* num_operands */,
-    TREG_ZERO, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 8, 16 },
-      { 0, },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x800000007ffc0000ULL,
-      0ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000000140000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+  { "adiffb_u.sn", TILE_OPC_ADIFFB_U_SN, 0x1, 3, TREG_SN, 1,
+    { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   },
-  { "adiffh.sn", TILE_OPC_ADIFFH_SN, 0x1 /* pipes */, 3 /* num_operands */,
-    TREG_SN, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 8, 16 },
-      { 0, },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x800000007ffc0000ULL,
-      0ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000008140000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+  { "adiffh", TILE_OPC_ADIFFH, 0x1, 3, TREG_ZERO, 1,
+    { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   },
-  { "and", TILE_OPC_AND, 0xf /* pipes */, 3 /* num_operands */,
-    TREG_ZERO, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 8, 16 },
-      { 9, 10, 17 },
-      { 11, 12, 18 },
-      { 13, 14, 19 },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x800000007ffc0000ULL,
-      0xfffe000000000000ULL,
-      0x80000000780c0000ULL,
-      0xf806000000000000ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000000180000ULL,
-      0x0808000000000000ULL,
-      0x8000000018000000ULL,
-      0x9800000000000000ULL,
-      -1ULL
-    }
+  { "adiffh.sn", TILE_OPC_ADIFFH_SN, 0x1, 3, TREG_SN, 1,
+    { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } },
   },
-  { "and.sn", TILE_OPC_AND_SN, 0x3 /* pipes */, 3 /* num_operands */,
-    TREG_SN, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 8, 16 },
-      { 9, 10, 17 },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x800000007ffc0000ULL,
-      0xfffe000000000000ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000008180000ULL,
-      0x0c08000000000000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+  { "and", TILE_OPC_AND, 0xf, 3, TREG_ZERO, 1,
+    { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } },
   },
-  { "andi", TILE_OPC_ANDI, 0xf /* pipes */, 3 /* num_operands */,
-    TREG_ZERO, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 8, 0 },
-      { 9, 10, 1 },
-      { 11, 12, 2 },
-      { 13, 14, 3 },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x800000007ff00000ULL,
-      0xfff8000000000000ULL,
-      0x8000000078000000ULL,
-      0xf800000000000000ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000050100000ULL,
-      0x3020000000000000ULL,
-      0x8000000050000000ULL,
-      0xc000000000000000ULL,
-      -1ULL
-    }
+  { "and.sn", TILE_OPC_AND_SN, 0x3, 3, TREG_SN, 1,
+    { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } },
   },
-  { "andi.sn", TILE_OPC_ANDI_SN, 0x3 /* pipes */, 3 /* num_operands */,
-    TREG_SN, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 8, 0 },
-      { 9, 10, 1 },
-      { 0, },
-      { 0, },
-      { 0, }
-    },
-    {
-      /* fixed_bit_masks */
-      0x800000007ff00000ULL,
-      0xfff8000000000000ULL,
-      0ULL,
-      0ULL,
-      0ULL
-    },
-    {
-      /* fixed_bit_values */
-      0x0000000058100000ULL,
-      0x3420000000000000ULL,
-      -1ULL,
-      -1ULL,
-      -1ULL
-    }
+  { "andi", TILE_OPC_ANDI, 0xf, 3, TREG_ZERO, 1,
+    { { 7, 8, 0 }, { 9, 10, 1 }, { 11, 12, 2 }, { 13, 14, 3 }, { 0, } },
   },
-  { "auli", TILE_OPC_AULI, 0x3 /* pipes */, 3 /* num_operands */,
-    TREG_ZERO, /* implicitly_written_register */
-    1, /* can_bundle */
-    {
-      /* operands */
-      { 7, 8, 4 },
-      { 9, 10, 5 },
-      { 0, },
-      { 0, },
-      {