diff options
author | Len Brown <len.brown@intel.com> | 2009-04-05 02:14:15 -0400 |
---|---|---|
committer | Len Brown <len.brown@intel.com> | 2009-04-05 02:14:15 -0400 |
commit | 478c6a43fcbc6c11609f8cee7c7b57223907754f (patch) | |
tree | a7f7952099da60d33032aed6de9c0c56c9f8779e /arch/sh/kernel/timers | |
parent | 8a3f257c704e02aee9869decd069a806b45be3f1 (diff) | |
parent | 6bb597507f9839b13498781e481f5458aea33620 (diff) |
Merge branch 'linus' into release
Conflicts:
arch/x86/kernel/cpu/cpufreq/longhaul.c
Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'arch/sh/kernel/timers')
-rw-r--r-- | arch/sh/kernel/timers/timer-cmt.c | 1 | ||||
-rw-r--r-- | arch/sh/kernel/timers/timer-mtu2.c | 4 | ||||
-rw-r--r-- | arch/sh/kernel/timers/timer-tmu.c | 22 |
3 files changed, 20 insertions, 7 deletions
diff --git a/arch/sh/kernel/timers/timer-cmt.c b/arch/sh/kernel/timers/timer-cmt.c index c127293271e..9aa348658ae 100644 --- a/arch/sh/kernel/timers/timer-cmt.c +++ b/arch/sh/kernel/timers/timer-cmt.c @@ -109,7 +109,6 @@ static struct irqaction cmt_irq = { .name = "timer", .handler = cmt_timer_interrupt, .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, - .mask = CPU_MASK_NONE, }; static void cmt_clk_init(struct clk *clk) diff --git a/arch/sh/kernel/timers/timer-mtu2.c b/arch/sh/kernel/timers/timer-mtu2.c index c3d237e1d56..9b0ef012647 100644 --- a/arch/sh/kernel/timers/timer-mtu2.c +++ b/arch/sh/kernel/timers/timer-mtu2.c @@ -35,7 +35,8 @@ #define MTU2_TSR_1 0xfffe4385 #define MTU2_TCNT_1 0xfffe4386 /* 16-bit counter */ -#if defined(CONFIG_CPU_SUBTYPE_SH7201) +#if defined(CONFIG_CPU_SUBTYPE_SH7201) || \ + defined(CONFIG_CPU_SUBTYPE_SH7203) #define MTU2_TGRA_1 0xfffe4388 #else #define MTU2_TGRA_1 0xfffe438a @@ -114,7 +115,6 @@ static struct irqaction mtu2_irq = { .name = "timer", .handler = mtu2_timer_interrupt, .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, - .mask = CPU_MASK_NONE, }; static unsigned int divisors[] = { 1, 4, 16, 64, 1, 1, 256 }; diff --git a/arch/sh/kernel/timers/timer-tmu.c b/arch/sh/kernel/timers/timer-tmu.c index 0db3f951033..c5d3396f596 100644 --- a/arch/sh/kernel/timers/timer-tmu.c +++ b/arch/sh/kernel/timers/timer-tmu.c @@ -146,7 +146,14 @@ static irqreturn_t tmu_timer_interrupt(int irq, void *dummy) _tmu_clear_status(TMU0); _tmu_set_irq(TMU0,tmu0_clockevent.mode != CLOCK_EVT_MODE_ONESHOT); - evt->event_handler(evt); + switch (tmu0_clockevent.mode) { + case CLOCK_EVT_MODE_ONESHOT: + case CLOCK_EVT_MODE_PERIODIC: + evt->event_handler(evt); + break; + default: + break; + } return IRQ_HANDLED; } @@ -155,7 +162,6 @@ static struct irqaction tmu0_irq = { .name = "periodic/oneshot timer", .handler = tmu_timer_interrupt, .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, - .mask = CPU_MASK_NONE, }; static void __init tmu_clk_init(struct clk *clk) @@ -237,6 +243,7 @@ static int tmu_timer_init(void) !defined(CONFIG_CPU_SUBTYPE_SH7721) && \ !defined(CONFIG_CPU_SUBTYPE_SH7760) && \ !defined(CONFIG_CPU_SUBTYPE_SH7785) && \ + !defined(CONFIG_CPU_SUBTYPE_SH7786) && \ !defined(CONFIG_CPU_SUBTYPE_SHX3) ctrl_outb(TMU_TOCR_INIT, TMU_TOCR); #endif @@ -254,7 +261,14 @@ static int tmu_timer_init(void) _tmu_start(TMU1); - sh_hpt_frequency = clk_get_rate(&tmu1_clk); + clocksource_sh.rating = 200; + clocksource_sh.mask = CLOCKSOURCE_MASK(32); + clocksource_sh.read = tmu_timer_read; + clocksource_sh.shift = 10; + clocksource_sh.mult = clocksource_hz2mult(clk_get_rate(&tmu1_clk), + clocksource_sh.shift); + clocksource_sh.flags = CLOCK_SOURCE_IS_CONTINUOUS; + clocksource_register(&clocksource_sh); tmu0_clockevent.mult = div_sc(frequency, NSEC_PER_SEC, tmu0_clockevent.shift); @@ -264,6 +278,7 @@ static int tmu_timer_init(void) clockevent_delta2ns(1, &tmu0_clockevent); tmu0_clockevent.cpumask = cpumask_of(0); + tmu0_clockevent.rating = 100; clockevents_register_device(&tmu0_clockevent); @@ -274,7 +289,6 @@ static struct sys_timer_ops tmu_timer_ops = { .init = tmu_timer_init, .start = tmu_timer_start, .stop = tmu_timer_stop, - .read = tmu_timer_read, }; struct sys_timer tmu_timer = { |