diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-05-23 09:00:40 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-05-23 09:00:40 -0700 |
commit | 1d767cae4dbd4116fc3b2cc3251a20760f98339f (patch) | |
tree | 79a1a48a67a9b4296ce062d61ee863fe7a46c77f /arch/sh/kernel/cpu/sh5 | |
parent | 6101167727932a929e37fb8a6eeb68bdbf54d58e (diff) | |
parent | 5f19f14fed7786652b9617c633db101d26a42251 (diff) |
Merge tag 'sh-for-linus' of git://github.com/pmundt/linux-sh
Pull SuperH updates from Paul Mundt:
- New CPUs: SH7734 (SH-4A), SH7264 and SH7269 (SH-2A)
- New boards: RSK2+SH7264, RSK2+SH7269
- Unbreaking kgdb for SMP
- Consolidation of _32/_64 page fault handling.
- watchdog and legacy DMA chainsawing, part 1
- Conversion to evt2irq() hwirq lookup, to support relocation of
vectored IRQs for irqdomains.
* tag 'sh-for-linus' of git://github.com/pmundt/linux-sh: (98 commits)
sh: intc: Kill off special reservation interface.
sh: Enable PIO API for hp6xx and se770x.
sh: Kill off machvec IRQ hinting.
sh: dma: More legacy cpu dma chainsawing.
sh: Kill off MAX_DMA_ADDRESS leftovers.
sh: Tidy up some of the cpu legacy dma header mess.
sh: Move sh4a dma header from cpu-sh4 to cpu-sh4a.
sh64: Fix up vmalloc fault range check.
Revert "sh: Ensure fixmap and store queue space can co-exist."
serial: sh-sci: Fix for port types without BRI interrupts.
sh: legacy PCI evt2irq migration.
sh: cpu dma evt2irq migration.
sh: sh7763rdp evt2irq migration.
sh: sdk7780 evt2irq migration.
sh: migor evt2irq migration.
sh: landisk evt2irq migration.
sh: kfr2r09 evt2irq migration.
sh: ecovec24 evt2irq migration.
sh: ap325rxa evt2irq migration.
sh: urquell evt2irq migration.
...
Diffstat (limited to 'arch/sh/kernel/cpu/sh5')
-rw-r--r-- | arch/sh/kernel/cpu/sh5/entry.S | 22 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh5/fpu.c | 3 |
2 files changed, 10 insertions, 15 deletions
diff --git a/arch/sh/kernel/cpu/sh5/entry.S b/arch/sh/kernel/cpu/sh5/entry.S index 6b80295dd7a..ff1f0e6e9be 100644 --- a/arch/sh/kernel/cpu/sh5/entry.S +++ b/arch/sh/kernel/cpu/sh5/entry.S @@ -335,7 +335,7 @@ tlb_miss: /* If the fast path handler fixed the fault, just drop through quickly to the restore code right away to return to the excepting context. */ - beqi/u r2, 0, tr1 + bnei/u r2, 0, tr1 fast_tlb_miss_restore: ld.q SP, SAVED_TR0, r2 @@ -1079,9 +1079,8 @@ restore_all: * * Kernel TLB fault handlers will get a slightly different interface. * (r2) struct pt_regs *, original register's frame pointer - * (r3) writeaccess, whether it's a store fault as opposed to load fault - * (r4) execaccess, whether it's a ITLB fault as opposed to DTLB fault - * (r5) Effective Address of fault + * (r3) page fault error code (see asm/thread_info.h) + * (r4) Effective Address of fault * (LINK) return address * (SP) = r2 * @@ -1092,26 +1091,25 @@ restore_all: tlb_miss_load: or SP, ZERO, r2 or ZERO, ZERO, r3 /* Read */ - or ZERO, ZERO, r4 /* Data */ - getcon TEA, r5 + getcon TEA, r4 pta call_do_page_fault, tr0 beq ZERO, ZERO, tr0 tlb_miss_store: or SP, ZERO, r2 - movi 1, r3 /* Write */ - or ZERO, ZERO, r4 /* Data */ - getcon TEA, r5 + movi FAULT_CODE_WRITE, r3 /* Write */ + getcon TEA, r4 pta call_do_page_fault, tr0 beq ZERO, ZERO, tr0 itlb_miss_or_IRQ: pta its_IRQ, tr0 beqi/u r4, EVENT_INTERRUPT, tr0 + + /* ITLB miss */ or SP, ZERO, r2 - or ZERO, ZERO, r3 /* Read */ - movi 1, r4 /* Text */ - getcon TEA, r5 + movi FAULT_CODE_ITLB, r3 + getcon TEA, r4 /* Fall through */ call_do_page_fault: diff --git a/arch/sh/kernel/cpu/sh5/fpu.c b/arch/sh/kernel/cpu/sh5/fpu.c index 4b3bb35e99f..9f8713aa718 100644 --- a/arch/sh/kernel/cpu/sh5/fpu.c +++ b/arch/sh/kernel/cpu/sh5/fpu.c @@ -107,8 +107,5 @@ asmlinkage void do_fpu_error(unsigned long ex, struct pt_regs *regs) regs->pc += 4; - tsk->thread.trap_no = 11; - tsk->thread.error_code = 0; - force_sig(SIGFPE, tsk); } |