diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-10-20 09:13:34 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-10-20 09:13:34 -0700 |
| commit | ed402af3c23a4804b3f8899263e8d0f97c62ab49 (patch) | |
| tree | 3aa971aea57f900a3060cc0545b199ef611f4dcf /arch/sh/include/mach-common/mach/sh7785lcr.h | |
| parent | 096e6f673dc02a6394dc9a7d8f8735c6978f5b91 (diff) | |
| parent | 40e24c403f325715f9c43b9fed2068641201ee0b (diff) | |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (112 commits)
sh: Move SH-4 CPU headers down one more level.
sh: Only build in gpio.o when CONFIG_GENERIC_GPIO is selected.
sh: Migrate common board headers to mach-common/.
sh: Move the CPU definition headers from asm/ to cpu/.
serial: sh-sci: Add support SCIF of SH7723
video: add sh_mobile_lcdc platform flags
video: remove unused sh_mobile_lcdc platform data
sh: remove consistent alloc cruft
sh: add dynamic crash base address support
sh: reduce Migo-R smc91x overruns
sh: Fix up some merge damage.
Fix debugfs_create_file's error checking method for arch/sh/mm/
Fix debugfs_create_dir's error checking method for arch/sh/kernel/
sh: ap325rxa: Add support RTC RX-8564LC in AP325RXA board
sh: Use sh7720 GPIO on magicpanelr2 board
sh: Add sh7720 pinmux code
sh: Use sh7203 GPIO on rsk7203 board
sh: Add sh7203 pinmux code
sh: Use sh7723 GPIO on AP325RXA board
sh: Add sh7723 pinmux code
...
Diffstat (limited to 'arch/sh/include/mach-common/mach/sh7785lcr.h')
| -rw-r--r-- | arch/sh/include/mach-common/mach/sh7785lcr.h | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/arch/sh/include/mach-common/mach/sh7785lcr.h b/arch/sh/include/mach-common/mach/sh7785lcr.h new file mode 100644 index 00000000000..1ce27d5c749 --- /dev/null +++ b/arch/sh/include/mach-common/mach/sh7785lcr.h @@ -0,0 +1,55 @@ +#ifndef __ASM_SH_RENESAS_SH7785LCR_H +#define __ASM_SH_RENESAS_SH7785LCR_H + +/* + * This board has 2 physical memory maps. + * It can be changed with DIP switch(S2-5). + * + * phys address | S2-5 = OFF | S2-5 = ON + * -----------------------------+---------------+--------------- + * 0x00000000 - 0x03ffffff(CS0) | NOR Flash | NOR Flash + * 0x04000000 - 0x05ffffff(CS1) | PLD | PLD + * 0x06000000 - 0x07ffffff(CS1) | reserved | I2C + * 0x08000000 - 0x0bffffff(CS2) | USB | DDR SDRAM + * 0x0c000000 - 0x0fffffff(CS3) | SD | DDR SDRAM + * 0x10000000 - 0x13ffffff(CS4) | SM107 | SM107 + * 0x14000000 - 0x17ffffff(CS5) | I2C | USB + * 0x18000000 - 0x1bffffff(CS6) | reserved | SD + * 0x40000000 - 0x5fffffff | DDR SDRAM | (cannot use) + * + */ + +#define NOR_FLASH_ADDR 0x00000000 +#define NOR_FLASH_SIZE 0x04000000 + +#define PLD_BASE_ADDR 0x04000000 +#define PLD_PCICR (PLD_BASE_ADDR + 0x00) +#define PLD_LCD_BK_CONTR (PLD_BASE_ADDR + 0x02) +#define PLD_LOCALCR (PLD_BASE_ADDR + 0x04) +#define PLD_POFCR (PLD_BASE_ADDR + 0x06) +#define PLD_LEDCR (PLD_BASE_ADDR + 0x08) +#define PLD_SWSR (PLD_BASE_ADDR + 0x0a) +#define PLD_VERSR (PLD_BASE_ADDR + 0x0c) +#define PLD_MMSR (PLD_BASE_ADDR + 0x0e) + +#define SM107_MEM_ADDR 0x10000000 +#define SM107_MEM_SIZE 0x00e00000 +#define SM107_REG_ADDR 0x13e00000 +#define SM107_REG_SIZE 0x00200000 + +#if defined(CONFIG_SH_SH7785LCR_29BIT_PHYSMAPS) +#define R8A66597_ADDR 0x14000000 /* USB */ +#define CG200_ADDR 0x18000000 /* SD */ +#define PCA9564_ADDR 0x06000000 /* I2C */ +#else +#define R8A66597_ADDR 0x08000000 +#define CG200_ADDR 0x0c000000 +#define PCA9564_ADDR 0x14000000 +#endif + +#define R8A66597_SIZE 0x00000100 +#define CG200_SIZE 0x00010000 +#define PCA9564_SIZE 0x00000100 + +#endif /* __ASM_SH_RENESAS_SH7785LCR_H */ + |