Linux-2.6.12-rc2v2.6.12-rc2

Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.

Let it rip!

23 files changed, 2339 insertions, 0 deletions

diff --git a/arch/sh/boards/se/7300/Makefile b/arch/sh/boards/se/7300/Makefile
new file mode 100644
index 00000000000..0fbd4f47815
--- /dev/null
+++ b/arch/sh/boards/se/7300/Makefile
@@ -0,0 +1,7 @@
+#
+# Makefile for the 7300 SolutionEngine specific parts of the kernel
+#
+
+obj-y	 := setup.o io.o irq.o
+
+obj-$(CONFIG_HEARTBEAT) += led.o
diff --git a/arch/sh/boards/se/7300/io.c b/arch/sh/boards/se/7300/io.c
new file mode 100644
index 00000000000..3c89def4648
--- /dev/null
+++ b/arch/sh/boards/se/7300/io.c
@@ -0,0 +1,265 @@
+/*
+ * arch/sh/boards/se/7300/io.c
+ *
+ * Copyright (C) 2003 YOSHII Takashi <yoshii-takashi@hitachi-ul.co.jp>
+ * Based on arch/sh/kernel/io_shmse.c
+ *
+ * I/O routine for SH-Mobile3 73180 SolutionEngine.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <asm/mach/se7300.h>
+#include <asm/io.h>
+
+#define badio(fn, a) panic("bad i/o operation %s for %08lx.", #fn, a)
+
+struct iop {
+	unsigned long start, end;
+	unsigned long base;
+	struct iop *(*check) (struct iop * p, unsigned long port);
+	unsigned char (*inb) (struct iop * p, unsigned long port);
+	unsigned short (*inw) (struct iop * p, unsigned long port);
+	void (*outb) (struct iop * p, unsigned char value, unsigned long port);
+	void (*outw) (struct iop * p, unsigned short value, unsigned long port);
+};
+
+struct iop *
+simple_check(struct iop *p, unsigned long port)
+{
+	if ((p->start <= port) && (port <= p->end))
+		return p;
+	else
+		badio(check, port);
+}
+
+struct iop *
+ide_check(struct iop *p, unsigned long port)
+{
+	if (((0x1f0 <= port) && (port <= 0x1f7)) || (port == 0x3f7))
+		return p;
+	return NULL;
+}
+
+unsigned char
+simple_inb(struct iop *p, unsigned long port)
+{
+	return *(unsigned char *) (p->base + port);
+}
+
+unsigned short
+simple_inw(struct iop *p, unsigned long port)
+{
+	return *(unsigned short *) (p->base + port);
+}
+
+void
+simple_outb(struct iop *p, unsigned char value, unsigned long port)
+{
+	*(unsigned char *) (p->base + port) = value;
+}
+
+void
+simple_outw(struct iop *p, unsigned short value, unsigned long port)
+{
+	*(unsigned short *) (p->base + port) = value;
+}
+
+unsigned char
+pcc_inb(struct iop *p, unsigned long port)
+{
+	unsigned long addr = p->base + port + 0x40000;
+	unsigned long v;
+
+	if (port & 1)
+		addr += 0x00400000;
+	v = *(volatile unsigned char *) addr;
+	return v;
+}
+
+void
+pcc_outb(struct iop *p, unsigned char value, unsigned long port)
+{
+	unsigned long addr = p->base + port + 0x40000;
+
+	if (port & 1)
+		addr += 0x00400000;
+	*(volatile unsigned char *) addr = value;
+}
+
+unsigned char
+bad_inb(struct iop *p, unsigned long port)
+{
+	badio(inb, port);
+}
+
+void
+bad_outb(struct iop *p, unsigned char value, unsigned long port)
+{
+	badio(inw, port);
+}
+
+/* MSTLANEX01 LAN at 0xb400:0000 */
+static struct iop laniop = {
+	.start = 0x300,
+	.end = 0x30f,
+	.base = 0xb4000000,
+	.check = simple_check,
+	.inb = simple_inb,
+	.inw = simple_inw,
+	.outb = simple_outb,
+	.outw = simple_outw,
+};
+
+/* NE2000 pc card NIC */
+static struct iop neiop = {
+	.start = 0x280,
+	.end = 0x29f,
+	.base = 0xb0600000 + 0x80,	/* soft 0x280 -> hard 0x300 */
+	.check = simple_check,
+	.inb = pcc_inb,
+	.inw = simple_inw,
+	.outb = pcc_outb,
+	.outw = simple_outw,
+};
+
+/* CF in CF slot */
+static struct iop cfiop = {
+	.base = 0xb0600000,
+	.check = ide_check,
+	.inb = pcc_inb,
+	.inw = simple_inw,
+	.outb = pcc_outb,
+	.outw = simple_outw,
+};
+
+static __inline__ struct iop *
+port2iop(unsigned long port)
+{
+	if (0) ;
+#if defined(CONFIG_SMC91111)
+	else if (laniop.check(&laniop, port))
+		return &laniop;
+#endif
+#if defined(CONFIG_NE2000)
+	else if (neiop.check(&neiop, port))
+		return &neiop;
+#endif
+#if defined(CONFIG_IDE)
+	else if (cfiop.check(&cfiop, port))
+		return &cfiop;
+#endif
+	else
+		return &neiop;	/* fallback */
+}
+
+static inline void
+delay(void)
+{
+	ctrl_inw(0xac000000);
+	ctrl_inw(0xac000000);
+}
+
+unsigned char
+sh7300se_inb(unsigned long port)
+{
+	struct iop *p = port2iop(port);
+	return (p->inb) (p, port);
+}
+
+unsigned char
+sh7300se_inb_p(unsigned long port)
+{
+	unsigned char v = sh7300se_inb(port);
+	delay();
+	return v;
+}
+
+unsigned short
+sh7300se_inw(unsigned long port)
+{
+	struct iop *p = port2iop(port);
+	return (p->inw) (p, port);
+}
+
+unsigned int
+sh7300se_inl(unsigned long port)
+{
+	badio(inl, port);
+}
+
+void
+sh7300se_outb(unsigned char value, unsigned long port)
+{
+	struct iop *p = port2iop(port);
+	(p->outb) (p, value, port);
+}
+
+void
+sh7300se_outb_p(unsigned char value, unsigned long port)
+{
+	sh7300se_outb(value, port);
+	delay();
+}
+
+void
+sh7300se_outw(unsigned short value, unsigned long port)
+{
+	struct iop *p = port2iop(port);
+	(p->outw) (p, value, port);
+}
+
+void
+sh7300se_outl(unsigned int value, unsigned long port)
+{
+	badio(outl, port);
+}
+
+void
+sh7300se_insb(unsigned long port, void *addr, unsigned long count)
+{
+	unsigned char *a = addr;
+	struct iop *p = port2iop(port);
+	while (count--)
+		*a++ = (p->inb) (p, port);
+}
+
+void
+sh7300se_insw(unsigned long port, void *addr, unsigned long count)
+{
+	unsigned short *a = addr;
+	struct iop *p = port2iop(port);
+	while (count--)
+		*a++ = (p->inw) (p, port);
+}
+
+void
+sh7300se_insl(unsigned long port, void *addr, unsigned long count)
+{
+	badio(insl, port);
+}
+
+void
+sh7300se_outsb(unsigned long port, const void *addr, unsigned long count)
+{
+	unsigned char *a = (unsigned char *) addr;
+	struct iop *p = port2iop(port);
+	while (count--)
+		(p->outb) (p, *a++, port);
+}
+
+void
+sh7300se_outsw(unsigned long port, const void *addr, unsigned long count)
+{
+	unsigned short *a = (unsigned short *) addr;
+	struct iop *p = port2iop(port);
+	while (count--)
+		(p->outw) (p, *a++, port);
+}
+
+void
+sh7300se_outsl(unsigned long port, const void *addr, unsigned long count)
+{
+	badio(outsw, port);
+}
diff --git a/arch/sh/boards/se/7300/irq.c b/arch/sh/boards/se/7300/irq.c
new file mode 100644
index 00000000000..96c8c23d6c9
--- /dev/null
+++ b/arch/sh/boards/se/7300/irq.c
@@ -0,0 +1,37 @@
+/*
+ * linux/arch/sh/boards/se/7300/irq.c
+ *
+ * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
+ *
+ * SH-Mobile SolutionEngine 7300 Support.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <asm/irq.h>
+#include <asm/io.h>
+#include <asm/mach/se7300.h>
+
+/*
+ * Initialize IRQ setting
+ */
+void __init
+init_7300se_IRQ(void)
+{
+	ctrl_outw(0x0028, PA_EPLD_MODESET);	/* mode set IRQ0,1 active low. */
+	ctrl_outw(0xa000, INTC_ICR1);	        /* IRQ mode; IRQ0,1 enable.    */
+	ctrl_outw(0x0000, PORT_PFCR);	        /* use F for IRQ[3:0] and SIU. */
+
+	/* PC_IRQ[0-3] -> IRQ0 (32) */
+	make_ipr_irq(IRQ0_IRQ, IRQ0_IPR_ADDR, IRQ0_IPR_POS, 0x0f - IRQ0_IRQ);
+	/* A_IRQ[0-3] -> IRQ1 (33) */
+	make_ipr_irq(IRQ1_IRQ, IRQ1_IPR_ADDR, IRQ1_IPR_POS, 0x0f - IRQ1_IRQ);
+	make_ipr_irq(SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY);
+	make_ipr_irq(DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
+	make_ipr_irq(DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
+	make_ipr_irq(VIO_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
+
+	ctrl_outw(0x2000, PA_MRSHPC + 0x0c);	/* mrshpc irq enable */
+}
diff --git a/arch/sh/boards/se/7300/led.c b/arch/sh/boards/se/7300/led.c
new file mode 100644
index 00000000000..02c7f846c84
--- /dev/null
+++ b/arch/sh/boards/se/7300/led.c
@@ -0,0 +1,69 @@
+/*
+ * linux/arch/sh/boards/se/7300/led.c
+ *
+ * Derived from linux/arch/sh/boards/se/770x/led.c
+ *
+ * Copyright (C) 2000 Stuart Menefy <stuart.menefy@st.com>
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License.  See linux/COPYING for more information.
+ *
+ * This file contains Solution Engine specific LED code.
+ */
+
+#include <linux/config.h>
+#include <linux/sched.h>
+#include <asm/mach/se7300.h>
+
+static void
+mach_led(int position, int value)
+{
+	volatile unsigned short *p = (volatile unsigned short *) PA_LED;
+
+	if (value) {
+		*p |= (1 << 8);
+	} else {
+		*p &= ~(1 << 8);
+	}
+}
+
+
+/* Cycle the LED's in the clasic Knightrider/Sun pattern */
+void
+heartbeat_7300se(void)
+{
+	static unsigned int cnt = 0, period = 0;
+	volatile unsigned short *p = (volatile unsigned short *) PA_LED;
+	static unsigned bit = 0, up = 1;
+
+	cnt += 1;
+	if (cnt < period) {
+		return;
+	}
+
+	cnt = 0;
+
+	/* Go through the points (roughly!):
+	 * f(0)=10, f(1)=16, f(2)=20, f(5)=35,f(inf)->110
+	 */
+	period = 110 - ((300 << FSHIFT) / ((avenrun[0] / 5) + (3 << FSHIFT)));
+
+	if (up) {
+		if (bit == 7) {
+			bit--;
+			up = 0;
+		} else {
+			bit++;
+		}
+	} else {
+		if (bit == 0) {
+			bit++;
+			up = 1;
+		} else {
+			bit--;
+		}
+	}
+	*p = 1 << (bit + 8);
+
+}
+
diff --git a/arch/sh/boards/se/7300/setup.c b/arch/sh/boards/se/7300/setup.c
new file mode 100644
index 00000000000..08536bc224d
--- /dev/null
+++ b/arch/sh/boards/se/7300/setup.c
@@ -0,0 +1,66 @@
+/*
+ * linux/arch/sh/boards/se/7300/setup.c
+ *
+ * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
+ *
+ * SH-Mobile SolutionEngine 7300 Support.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <asm/machvec.h>
+#include <asm/machvec_init.h>
+#include <asm/mach/io.h>
+
+void heartbeat_7300se(void);
+void init_7300se_IRQ(void);
+
+const char *
+get_system_type(void)
+{
+	return "SolutionEngine 7300";
+}
+
+/*
+ * The Machine Vector
+ */
+
+struct sh_machine_vector mv_7300se __initmv = {
+	.mv_nr_irqs = 109,
+	.mv_inb = sh7300se_inb,
+	.mv_inw = sh7300se_inw,
+	.mv_inl = sh7300se_inl,
+	.mv_outb = sh7300se_outb,
+	.mv_outw = sh7300se_outw,
+	.mv_outl = sh7300se_outl,
+
+	.mv_inb_p = sh7300se_inb_p,
+	.mv_inw_p = sh7300se_inw,
+	.mv_inl_p = sh7300se_inl,
+	.mv_outb_p = sh7300se_outb_p,
+	.mv_outw_p = sh7300se_outw,
+	.mv_outl_p = sh7300se_outl,
+
+	.mv_insb = sh7300se_insb,
+	.mv_insw = sh7300se_insw,
+	.mv_insl = sh7300se_insl,
+	.mv_outsb = sh7300se_outsb,
+	.mv_outsw = sh7300se_outsw,
+	.mv_outsl = sh7300se_outsl,
+
+	.mv_init_irq = init_7300se_IRQ,
+#ifdef CONFIG_HEARTBEAT
+	.mv_heartbeat = heartbeat_7300se,
+#endif
+};
+
+ALIAS_MV(7300se)
+/*
+ * Initialize the board
+ */
+void __init
+platform_setup(void)
+{
+
+}
diff --git a/arch/sh/boards/se/73180/Makefile b/arch/sh/boards/se/73180/Makefile
new file mode 100644
index 00000000000..8f63886a0f3
--- /dev/null
+++ b/arch/sh/boards/se/73180/Makefile
@@ -0,0 +1,7 @@
+#
+# Makefile for the 73180 SolutionEngine specific parts of the kernel
+#
+
+obj-y	 := setup.o io.o irq.o
+
+obj-$(CONFIG_HEARTBEAT) += led.o
diff --git a/arch/sh/boards/se/73180/io.c b/arch/sh/boards/se/73180/io.c
new file mode 100644
index 00000000000..73648cbe367
--- /dev/null
+++ b/arch/sh/boards/se/73180/io.c
@@ -0,0 +1,265 @@
+/*
+ * arch/sh/boards/se/73180/io.c
+ *
+ * Copyright (C) 2003 YOSHII Takashi <yoshii-takashi@hitachi-ul.co.jp>
+ * Based on arch/sh/boards/se/7300/io.c
+ *
+ * I/O routine for SH-Mobile3 73180 SolutionEngine.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <asm/mach/se73180.h>
+#include <asm/io.h>
+
+#define badio(fn, a) panic("bad i/o operation %s for %08lx.", #fn, a)
+
+struct iop {
+	unsigned long start, end;
+	unsigned long base;
+	struct iop *(*check) (struct iop * p, unsigned long port);
+	unsigned char (*inb) (struct iop * p, unsigned long port);
+	unsigned short (*inw) (struct iop * p, unsigned long port);
+	void (*outb) (struct iop * p, unsigned char value, unsigned long port);
+	void (*outw) (struct iop * p, unsigned short value, unsigned long port);
+};
+
+struct iop *
+simple_check(struct iop *p, unsigned long port)
+{
+	if ((p->start <= port) && (port <= p->end))
+		return p;
+	else
+		badio(check, port);
+}
+
+struct iop *
+ide_check(struct iop *p, unsigned long port)
+{
+	if (((0x1f0 <= port) && (port <= 0x1f7)) || (port == 0x3f7))
+		return p;
+	return NULL;
+}
+
+unsigned char
+simple_inb(struct iop *p, unsigned long port)
+{
+	return *(unsigned char *) (p->base + port);
+}
+
+unsigned short
+simple_inw(struct iop *p, unsigned long port)
+{
+	return *(unsigned short *) (p->base + port);
+}
+
+void
+simple_outb(struct iop *p, unsigned char value, unsigned long port)
+{
+	*(unsigned char *) (p->base + port) = value;
+}
+
+void
+simple_outw(struct iop *p, unsigned short value, unsigned long port)
+{
+	*(unsigned short *) (p->base + port) = value;
+}
+
+unsigned char
+pcc_inb(struct iop *p, unsigned long port)
+{
+	unsigned long addr = p->base + port + 0x40000;
+	unsigned long v;
+
+	if (port & 1)
+		addr += 0x00400000;
+	v = *(volatile unsigned char *) addr;
+	return v;
+}
+
+void
+pcc_outb(struct iop *p, unsigned char value, unsigned long port)
+{
+	unsigned long addr = p->base + port + 0x40000;
+
+	if (port & 1)
+		addr += 0x00400000;
+	*(volatile unsigned char *) addr = value;
+}
+
+unsigned char
+bad_inb(struct iop *p, unsigned long port)
+{
+	badio(inb, port);
+}
+
+void
+bad_outb(struct iop *p, unsigned char value, unsigned long port)
+{
+	badio(inw, port);
+}
+
+/* MSTLANEX01 LAN at 0xb400:0000 */
+static struct iop laniop = {
+	.start = 0x300,
+	.end = 0x30f,
+	.base = 0xb4000000,
+	.check = simple_check,
+	.inb = simple_inb,
+	.inw = simple_inw,
+	.outb = simple_outb,
+	.outw = simple_outw,
+};
+
+/* NE2000 pc card NIC */
+static struct iop neiop = {
+	.start = 0x280,
+	.end = 0x29f,
+	.base = 0xb0600000 + 0x80,	/* soft 0x280 -> hard 0x300 */
+	.check = simple_check,
+	.inb = pcc_inb,
+	.inw = simple_inw,
+	.outb = pcc_outb,
+	.outw = simple_outw,
+};
+
+/* CF in CF slot */
+static struct iop cfiop = {
+	.base = 0xb0600000,
+	.check = ide_check,
+	.inb = pcc_inb,
+	.inw = simple_inw,
+	.outb = pcc_outb,
+	.outw = simple_outw,
+};
+
+static __inline__ struct iop *
+port2iop(unsigned long port)
+{
+	if (0) ;
+#if defined(CONFIG_SMC91111)
+	else if (laniop.check(&laniop, port))
+		return &laniop;
+#endif
+#if defined(CONFIG_NE2000)
+	else if (neiop.check(&neiop, port))
+		return &neiop;
+#endif
+#if defined(CONFIG_IDE)
+	else if (cfiop.check(&cfiop, port))
+		return &cfiop;
+#endif
+	else
+		return &neiop;	/* fallback */
+}
+
+static inline void
+delay(void)
+{
+	ctrl_inw(0xac000000);
+	ctrl_inw(0xac000000);
+}
+
+unsigned char
+sh73180se_inb(unsigned long port)
+{
+	struct iop *p = port2iop(port);
+	return (p->inb) (p, port);
+}
+
+unsigned char
+sh73180se_inb_p(unsigned long port)
+{
+	unsigned char v = sh73180se_inb(port);
+	delay();
+	return v;
+}
+
+unsigned short
+sh73180se_inw(unsigned long port)
+{
+	struct iop *p = port2iop(port);
+	return (p->inw) (p, port);
+}
+
+unsigned int
+sh73180se_inl(unsigned long port)
+{
+	badio(inl, port);
+}
+
+void
+sh73180se_outb(unsigned char value, unsigned long port)
+{
+	struct iop *p = port2iop(port);
+	(p->outb) (p, value, port);
+}
+
+void
+sh73180se_outb_p(unsigned char value, unsigned long port)
+{
+	sh73180se_outb(value, port);
+	delay();
+}
+
+void
+sh73180se_outw(unsigned short value, unsigned long port)
+{
+	struct iop *p = port2iop(port);
+	(p->outw) (p, value, port);
+}
+
+void
+sh73180se_outl(unsigned int value, unsigned long port)
+{
+	badio(outl, port);
+}
+
+void
+sh73180se_insb(unsigned long port, void *addr, unsigned long count)
+{
+	unsigned char *a = addr;
+	struct iop *p = port2iop(port);
+	while (count--)
+		*a++ = (p->inb) (p, port);
+}
+
+void
+sh73180se_insw(unsigned long port, void *addr, unsigned long count)
+{
+	unsigned short *a = addr;
+	struct iop *p = port2iop(port);
+	while (count--)
+		*a++ = (p->inw) (p, port);
+}
+
+void
+sh73180se_insl(unsigned long port, void *addr, unsigned long count)
+{
+	badio(insl, port);
+}
+
+void
+sh73180se_outsb(unsigned long port, const void *addr, unsigned long count)
+{
+	unsigned char *a = (unsigned char *) addr;
+	struct iop *p = port2iop(port);
+	while (count--)
+		(p->outb) (p, *a++, port);
+}
+
+void
+sh73180se_outsw(unsigned long port, const void *addr, unsigned long count)
+{
+	unsigned short *a = (unsigned short *) addr;
+	struct iop *p = port2iop(port);
+	while (count--)
+		(p->outw) (p, *a++, port);
+}
+
+void
+sh73180se_outsl(unsigned long port, const void *addr, unsigned long count)
+{
+	badio(outsw, port);
+}
diff --git a/arch/sh/boards/se/73180/irq.c b/arch/sh/boards/se/73180/irq.c
new file mode 100644
index 00000000000..70f04caad9a
--- /dev/null
+++ b/arch/sh/boards/se/73180/irq.c
@@ -0,0 +1,137 @@
+/*
+ * arch/sh/boards/se/73180/irq.c
+ *
+ * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
+ * Based on arch/sh/boards/se/7300/irq.c
+ *
+ * Modified for SH-Mobile SolutionEngine 73180 Support
+ *              by YOSHII Takashi <yoshii-takashi@hitachi-ul.co.jp>
+ *
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <asm/irq.h>
+#include <asm/io.h>
+#include <asm/mach/se73180.h>
+
+static int
+intreq2irq(int i)
+{
+	if (i == 5)
+		return 10;
+	return 32 + 7 - i;
+}
+
+static int
+irq2intreq(int irq)
+{
+	if (irq == 10)
+		return 5;
+	return 7 - (irq - 32);
+}
+
+static void
+disable_intreq_irq(unsigned int irq)
+{
+	ctrl_outb(1 << (7 - irq2intreq(irq)), INTMSK0);
+}
+
+static void
+enable_intreq_irq(unsigned int irq)
+{
+	ctrl_outb(1 << (7 - irq2intreq(irq)), INTMSKCLR0);
+}
+
+static void
+mask_and_ack_intreq_irq(unsigned int irq)
+{
+	disable_intreq_irq(irq);
+}
+
+static unsigned int
+startup_intreq_irq(unsigned int irq)
+{
+	enable_intreq_irq(irq);
+	return 0;
+}
+
+static void
+shutdown_intreq_irq(unsigned int irq)
+{
+	disable_intreq_irq(irq);
+}
+
+static void
+end_intreq_irq(unsigned int irq)
+{
+	if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
+		enable_intreq_irq(irq);
+}
+
+static struct hw_interrupt_type intreq_irq_type = {
+	.typename = "intreq",
+	.startup = startup_intreq_irq,
+	.shutdown = shutdown_intreq_irq,
+	.enable = enable_intreq_irq,
+	.disable = disable_intreq_irq,
+	.ack = mask_and_ack_intreq_irq,
+	.end = end_intreq_irq
+};
+
+void
+make_intreq_irq(unsigned int irq)
+{
+	disable_irq_nosync(irq);
+	irq_desc[irq].handler = &intreq_irq_type;
+	disable_intreq_irq(irq);
+}
+
+int
+shmse_irq_demux(int irq)
+{
+	if (irq == IRQ5_IRQ)
+		return 10;
+	return irq;
+}
+
+/*
+ * Initialize IRQ setting
+ */
+void __init
+init_73180se_IRQ(void)
+{
+	make_ipr_irq(SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY);
+
+	ctrl_outw(0x2000, 0xb03fffec);	/* mrshpc irq enable */
+	ctrl_outw(0x2000, 0xb07fffec);	/* mrshpc irq enable */
+	ctrl_outl(3 << ((7 - 5) * 4), INTC_INTPRI0);	/* irq5 pri=3 */
+	ctrl_outw(2 << ((7 - 5) * 2), INTC_ICR1);	/* low-level irq */
+	make_intreq_irq(10);
+
+	make_ipr_irq(VPU_IRQ, VPU_IPR_ADDR, VPU_IPR_POS, 8);
+
+	ctrl_outb(0x0f, INTC_IMCR5);	/* enable SCIF IRQ */
+
+	make_ipr_irq(DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
+	make_ipr_irq(DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
+	make_ipr_irq(DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY);
+	make_ipr_irq(IIC0_ALI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY);
+	make_ipr_irq(IIC0_TACKI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS,
+		     IIC0_PRIORITY);
+	make_ipr_irq(IIC0_WAITI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS,
+		     IIC0_PRIORITY);
+	make_ipr_irq(IIC0_DTEI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY);
+	make_ipr_irq(SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY);
+	make_ipr_irq(SIU_IRQ, SIU_IPR_ADDR, SIU_IPR_POS, SIU_PRIORITY);
+
+	/* VIO interrupt */
+	make_ipr_irq(CEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
+	make_ipr_irq(BEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
+	make_ipr_irq(VEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
+
+	make_ipr_irq(LCDC_IRQ, LCDC_IPR_ADDR, LCDC_IPR_POS, LCDC_PRIORITY);
+	ctrl_outw(0x2000, PA_MRSHPC + 0x0c);	/* mrshpc irq enable */
+}
diff --git a/arch/sh/boards/se/73180/led.c b/arch/sh/boards/se/73180/led.c
new file mode 100644
index 00000000000..1e8f1cf3e10
--- /dev/null
+++ b/arch/sh/boards/se/73180/led.c
@@ -0,0 +1,67 @@
+/*
+ * arch/sh/boards/se/73180/led.c
+ *
+ * Derived from arch/sh/boards/se/770x/led.c
+ *
+ * Copyright (C) 2000 Stuart Menefy <stuart.menefy@st.com>
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License.  See linux/COPYING for more information.
+ *
+ * This file contains Solution Engine specific LED code.
+ */
+
+#include <linux/config.h>
+#include <linux/sched.h>
+#include <asm/mach/se73180.h>
+
+static void
+mach_led(int position, int value)
+{
+	volatile unsigned short *p = (volatile unsigned short *) PA_LED;
+
+	if (value) {
+		*p |= (1 << LED_SHIFT);
+	} else {
+		*p &= ~(1 << LED_SHIFT);
+	}
+}
+
+/* Cycle the LED's in the clasic Knightrider/Sun pattern */
+void
+heartbeat_73180se(void)
+{
+	static unsigned int cnt = 0, period = 0;
+	volatile unsigned short *p = (volatile unsigned short *) PA_LED;
+	static unsigned bit = 0, up = 1;
+
+	cnt += 1;
+	if (cnt < period) {
+		return;
+	}
+
+	cnt = 0;
+
+	/* Go through the points (roughly!):
+	 * f(0)=10, f(1)=16, f(2)=20, f(5)=35,f(inf)->110
+	 */
+	period = 110 - ((300 << FSHIFT) / ((avenrun[0] / 5) + (3 << FSHIFT)));
+
+	if (up) {
+		if (bit == 7) {
+			bit--;
+			up = 0;
+		} else {
+			bit++;
+		}
+	} else {
+		if (bit == 0) {
+			bit++;
+			up = 1;
+		} else {
+			bit--;
+		}
+	}
+	*p = 1 << (bit + LED_SHIFT);
+
+}
diff --git a/arch/sh/boards/se/73180/setup.c b/arch/sh/boards/se/73180/setup.c
new file mode 100644
index 00000000000..07fa90c38a0
--- /dev/null
+++ b/arch/sh/boards/se/73180/setup.c
@@ -0,0 +1,68 @@
+/*
+ * arch/sh/boards/se/73180/setup.c
+ *
+ * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
+ * Based on arch/sh/setup_shmse.c
+ *
+ * Modified for 73180 SolutionEngine
+ *           by YOSHII Takashi <yoshii-takashi@hitachi-ul.co.jp>
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <asm/machvec.h>
+#include <asm/machvec_init.h>
+#include <asm/mach/io.h>
+
+void heartbeat_73180se(void);
+void init_73180se_IRQ(void);
+
+const char *
+get_system_type(void)
+{
+	return "SolutionEngine 73180";
+}
+
+/*
+ * The Machine Vector
+ */
+
+struct sh_machine_vector mv_73180se __initmv = {
+	.mv_nr_irqs = 108,
+	.mv_inb = sh73180se_inb,
+	.mv_inw = sh73180se_inw,
+	.mv_inl = sh73180se_inl,
+	.mv_outb = sh73180se_outb,
+	.mv_outw = sh73180se_outw,
+	.mv_outl = sh73180se_outl,
+
+	.mv_inb_p = sh73180se_inb_p,
+	.mv_inw_p = sh73180se_inw,
+	.mv_inl_p = sh73180se_inl,
+	.mv_outb_p = sh73180se_outb_p,
+	.mv_outw_p = sh73180se_outw,
+	.mv_outl_p = sh73180se_outl,
+
+	.mv_insb = sh73180se_insb,
+	.mv_insw = sh73180se_insw,
+	.mv_insl = sh73180se_insl,
+	.mv_outsb = sh73180se_outsb,
+	.mv_outsw = sh73180se_outsw,
+	.mv_outsl = sh73180se_outsl,
+
+	.mv_init_irq = init_73180se_IRQ,
+#ifdef CONFIG_HEARTBEAT
+	.mv_heartbeat = heartbeat_73180se,
+#endif
+};
+
+ALIAS_MV(73180se)
+/*
+ * Initialize the board
+ */
+void __init
+platform_setup(void)
+{
+
+}
diff --git a/arch/sh/boards/se/770x/Makefile b/arch/sh/boards/se/770x/Makefile
new file mode 100644
index 00000000000..be89a73cc41
--- /dev/null
+++ b/arch/sh/boards/se/770x/Makefile
@@ -0,0 +1,6 @@
+#
+# Makefile for the 770x SolutionEngine specific parts of the kernel
+#
+
+obj-y	 := mach.o setup.o io.o irq.o led.o
+
diff --git a/arch/sh/boards/se/770x/io.c b/arch/sh/boards/se/770x/io.c
new file mode 100644
index 00000000000..9a39ee96314
--- /dev/null
+++ b/arch/sh/boards/se/770x/io.c
@@ -0,0 +1,226 @@
+/* $Id: io.c,v 1.5 2004/02/22 23:08:43 kkojima Exp $
+ *
+ * linux/arch/sh/kernel/io_se.c
+ *
+ * Copyright (C) 2000  Kazumoto Kojima
+ *
+ * I/O routine for Hitachi SolutionEngine.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <asm/io.h>
+#include <asm/se/se.h>
+
+/* SH pcmcia io window base, start and end.  */
+int sh_pcic_io_wbase = 0xb8400000;
+int sh_pcic_io_start;
+int sh_pcic_io_stop;
+int sh_pcic_io_type;
+int sh_pcic_io_dummy;
+
+static inline void delay(void)
+{
+	ctrl_inw(0xa0000000);
+}
+
+/* MS7750 requires special versions of in*, out* routines, since
+   PC-like io ports are located at upper half byte of 16-bit word which
+   can be accessed only with 16-bit wide.  */
+
+static inline volatile __u16 *
+port2adr(unsigned int port)
+{
+	if (port >= 0x2000)
+		return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000));
+	else if (port >= 0x1000)
+		return (volatile __u16 *) (PA_83902 + (port << 1));
+	else if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop)
+		return (volatile __u16 *) (sh_pcic_io_wbase + (port &~ 1));
+	else
+		return (volatile __u16 *) (PA_SUPERIO + (port << 1));
+}
+
+static inline int
+shifted_port(unsigned long port)
+{
+	/* For IDE registers, value is not shifted */
+	if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
+		return 0;
+	else
+		return 1;
+}
+
+#define maybebadio(name,port) \
+  printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \
+	 #name, (port), (__u32) __builtin_return_address(0))
+
+unsigned char se_inb(unsigned long port)
+{
+	if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop)
+		return *(__u8 *) (sh_pcic_io_wbase + 0x40000 + port); 
+	else if (shifted_port(port))
+		return (*port2adr(port) >> 8); 
+	else
+		return (*port2adr(port))&0xff; 
+}
+
+unsigned char se_inb_p(unsigned long port)
+{
+	unsigned long v;
+
+	if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop)
+		v = *(__u8 *) (sh_pcic_io_wbase + 0x40000 + port); 
+	else if (shifted_port(port))
+		v = (*port2adr(port) >> 8); 
+	else
+		v = (*port2adr(port))&0xff; 
+	delay();
+	return v;
+}
+
+unsigned short se_inw(unsigned long port)
+{
+	if (port >= 0x2000 ||
+	    (sh_pcic_io_start <= port && port <= sh_pcic_io_stop))
+		return *port2adr(port);
+	else
+		maybebadio(inw, port);
+	return 0;
+}
+
+unsigned int se_inl(unsigned long port)
+{
+	maybebadio(inl, port);
+	return 0;
+}
+
+void se_outb(unsigned char value, unsigned long port)
+{
+	if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop)
+		*(__u8 *)(sh_pcic_io_wbase + port) = value; 
+	else if (shifted_port(port))
+		*(port2adr(port)) = value << 8;
+	else
+		*(port2adr(port)) = value;
+}
+
+void se_outb_p(unsigned char value, unsigned long port)
+{
+	if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop)
+		*(__u8 *)(sh_pcic_io_wbase + port) = value; 
+	else if (shifted_port(port))
+		*(port2adr(port)) = value << 8;
+	else
+		*(port2adr(port)) = value;
+	delay();
+}
+
+void se_outw(unsigned short value, unsigned long port)
+{
+	if (port >= 0x2000 ||
+	    (sh_pcic_io_start <= port && port <= sh_pcic_io_stop))
+		*port2adr(port) = value;
+	else
+		maybebadio(outw, port);
+}
+
+void se_outl(unsigned int value, unsigned long port)
+{
+	maybebadio(outl, port);
+}
+
+void se_insb(unsigned long port, void *addr, unsigned long count)
+{
+	volatile __u16 *p = port2adr(port);
+	__u8 *ap = addr;
+
+	if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop) {
+		volatile __u8 *bp = (__u8 *) (sh_pcic_io_wbase + 0x40000 + port); 
+		while (count--)
+			*ap++ = *bp;
+	} else if (shifted_port(port)) {
+		while (count--)
+			*ap++ = *p >> 8;
+	} else {
+		while (count--)
+			*ap++ = *p;
+	}
+}
+
+void se_insw(unsigned long port, void *addr, unsigned long count)
+{
+	volatile __u16 *p = port2adr(port);
+	__u16 *ap = addr;
+	while (count--)
+		*ap++ = *p;
+}
+
+void se_insl(unsigned long port, void *addr, unsigned long count)
+{
+	maybebadio(insl, port);
+}
+
+void se_outsb(unsigned long port, const void *addr, unsigned long count)
+{
+	volatile __u16 *p = port2adr(port);
+	const __u8 *ap = addr;
+
+	if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop) {
+		volatile __u8 *bp = (__u8 *) (sh_pcic_io_wbase + port); 
+		while (count--)
+			*bp = *ap++;
+	} else if (shifted_port(port)) {
+		while (count--)
+			*p = *ap++ << 8;
+	} else {
+		while (count--)
+			*p = *ap++;
+	}
+}
+
+void se_outsw(unsigned long port, const void *addr, unsigned long count)
+{
+	volatile __u16 *p = port2adr(port);
+	const __u16 *ap = addr;
+	while (count--)
+		*p = *ap++;
+}
+
+void se_outsl(unsigned long port, const void *addr, unsigned long count)
+{
+	maybebadio(outsw, port);
+}
+
+/* Map ISA bus address to the real address. Only for PCMCIA.  */
+
+/* ISA page descriptor.  */
+static __u32 sh_isa_memmap[256];
+
+static int
+sh_isa_mmap(__u32 start, __u32 length, __u32 offset)
+{
+	int idx;
+
+	if (start >= 0x100000 || (start & 0xfff) || (length != 0x1000))
+		return -1;
+
+	idx = start >> 12;
+	sh_isa_memmap[idx] = 0xb8000000 + (offset &~ 0xfff);
+#if 0
+	printk("sh_isa_mmap: start %x len %x offset %x (idx %x paddr %x)\n",
+	       start, length, offset, idx, sh_isa_memmap[idx]);
+#endif
+	return 0;
+}
+
+unsigned long
+se_isa_port2addr(unsigned long offset)
+{
+	int idx;
+
+	idx = (offset >> 12) & 0xff;
+	offset &= 0xfff;
+	return sh_isa_memmap[idx] + offset;
+}
diff --git a/arch/sh/boards/se/770x/irq.c b/arch/sh/boards/se/770x/irq.c
new file mode 100644
index 00000000000..210897b315f
--- /dev/null
+++ b/arch/sh/boards/se/770x/irq.c
@@ -0,0 +1,80 @@
+/*
+ * linux/arch/sh/boards/se/770x/irq.c
+ *
+ * Copyright (C) 2000  Kazumoto Kojima
+ *
+ * Hitachi SolutionEngine Support.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <asm/irq.h>
+#include <asm/io.h>
+#include <asm/se/se.h>
+
+/*
+ * Initialize IRQ setting
+ */
+void __init init_se_IRQ(void)
+{
+        /*
+         * Super I/O (Just mimic PC):
+         *  1: keyboard
+         *  3: serial 0
+         *  4: serial 1
+         *  5: printer
+         *  6: floppy
+         *  8: rtc
+         * 12: mouse
+         * 14: ide0
+         */
+#if defined(CONFIG_CPU_SUBTYPE_SH7705)
+	/* Disable all interrupts */
+	ctrl_outw(0, BCR_ILCRA);
+	ctrl_outw(0, BCR_ILCRB);
+	ctrl_outw(0, BCR_ILCRC);
+	ctrl_outw(0, BCR_ILCRD);
+	ctrl_outw(0, BCR_ILCRE);
+	ctrl_outw(0, BCR_ILCRF);
+	ctrl_outw(0, BCR_ILCRG);
+	/* This is default value */
+	make_ipr_irq(0xf-0x2, BCR_ILCRA, 2, 0x2);
+	make_ipr_irq(0xf-0xa, BCR_ILCRA, 1, 0xa);
+	make_ipr_irq(0xf-0x5, BCR_ILCRB, 0, 0x5);
+	make_ipr_irq(0xf-0x8, BCR_ILCRC, 1, 0x8);
+	make_ipr_irq(0xf-0xc, BCR_ILCRC, 0, 0xc);
+	make_ipr_irq(0xf-0xe, BCR_ILCRD, 3, 0xe);
+	make_ipr_irq(0xf-0x3, BCR_ILCRD, 1, 0x3); /* LAN */
+	make_ipr_irq(0xf-0xd, BCR_ILCRE, 2, 0xd);
+	make_ipr_irq(0xf-0x9, BCR_ILCRE, 1, 0x9);
+	make_ipr_irq(0xf-0x1, BCR_ILCRE, 0, 0x1);
+	make_ipr_irq(0xf-0xf, BCR_ILCRF, 3, 0xf);
+	make_ipr_irq(0xf-0xb, BCR_ILCRF, 1, 0xb);
+	make_ipr_irq(0xf-0x7, BCR_ILCRG, 3, 0x7);
+	make_ipr_irq(0xf-0x6, BCR_ILCRG, 2, 0x6);
+	make_ipr_irq(0xf-0x4, BCR_ILCRG, 1, 0x4);
+#else
+        make_ipr_irq(14, BCR_ILCRA, 2, 0x0f-14);
+        make_ipr_irq(12, BCR_ILCRA, 1, 0x0f-12);
+        make_ipr_irq( 8, BCR_ILCRB, 1, 0x0f- 8);
+        make_ipr_irq( 6, BCR_ILCRC, 3, 0x0f- 6);
+        make_ipr_irq( 5, BCR_ILCRC, 2, 0x0f- 5);
+        make_ipr_irq( 4, BCR_ILCRC, 1, 0x0f- 4);
+        make_ipr_irq( 3, BCR_ILCRC, 0, 0x0f- 3);
+        make_ipr_irq( 1, BCR_ILCRD, 3, 0x0f- 1);
+
+        make_ipr_irq(10, BCR_ILCRD, 1, 0x0f-10); /* LAN */
+
+        make_ipr_irq( 0, BCR_ILCRE, 3, 0x0f- 0); /* PCIRQ3 */
+        make_ipr_irq(11, BCR_ILCRE, 2, 0x0f-11); /* PCIRQ2 */
+        make_ipr_irq( 9, BCR_ILCRE, 1, 0x0f- 9); /* PCIRQ1 */
+        make_ipr_irq( 7, BCR_ILCRE, 0, 0x0f- 7); /* PCIRQ0 */
+
+        /* #2, #13 are allocated for SLOT IRQ #1 and #2 (for now) */
+        /* NOTE: #2 and #13 are not used on PC */
+        make_ipr_irq(13, BCR_ILCRG, 1, 0x0f-13); /* SLOTIRQ2 */
+        make_ipr_irq( 2, BCR_ILCRG, 0, 0x0f- 2); /* SLOTIRQ1 */
+#endif
+}
diff --git a/arch/sh/boards/se/770x/led.c b/arch/sh/boards/se/770x/led.c
new file mode 100644
index 00000000000..5c64e8ab2cf
--- /dev/null
+++ b/arch/sh/boards/se/770x/led.c
@@ -0,0 +1,68 @@
+/*
+ * linux/arch/sh/kernel/led_se.c
+ *
+ * Copyright (C) 2000 Stuart Menefy <stuart.menefy@st.com>
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License.  See linux/COPYING for more information.
+ *
+ * This file contains Solution Engine specific LED code.
+ */
+
+#include <linux/config.h>
+#include <asm/se/se.h>
+
+static void mach_led(int position, int value)
+{
+	volatile unsigned short* p = (volatile unsigned short*)PA_LED;
+
+	if (value) {
+		*p |= (1<<8);
+	} else {
+		*p &= ~(1<<8);
+	}
+}
+
+#ifdef CONFIG_HEARTBEAT
+
+#include <linux/sched.h>
+
+/* Cycle the LED's in the clasic Knightrider/Sun pattern */
+void heartbeat_se(void)
+{
+	static unsigned int cnt = 0, period = 0;
+	volatile unsigned short* p = (volatile unsigned short*)PA_LED;
+	static unsigned bit = 0, up = 1;
+
+	cnt += 1;
+	if (cnt < period) {
+		return;
+	}
+
+	cnt = 0;
+
+	/* Go through the points (roughly!):
+	 * f(0)=10, f(1)=16, f(2)=20, f(5)=35,f(inf)->110
+	 */
+	period = 110 - ( (300<<FSHIFT)/
+			 ((avenrun[0]/5) + (3<<FSHIFT)) );
+
+	if (up) {
+		if (bit == 7) {
+			bit--;
+			up=0;
+		} else {
+			bit ++;
+		}
+	} else {
+		if (bit == 0) {
+			bit++;
+			up=1;
+		} else {
+			bit--;
+		}
+	}
+	*p = 1<<(bit+8);
+
+}
+#endif /* CONFIG_HEARTBEAT */
diff --git a/arch/sh/boards/se/770x/mach.c b/arch/sh/boards/se/770x/mach.c
new file mode 100644
index 00000000000..f9b4c56cc47
--- /dev/null
+++ b/arch/sh/boards/se/770x/mach.c
@@ -0,0 +1,68 @@
+/*
+ * linux/arch/sh/kernel/mach_se.c
+ *
+ * Copyright (C) 2000 Stuart Menefy (stuart.menefy@st.com)
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License.  See linux/COPYING for more information.
+ *
+ * Machine vector for the Hitachi SolutionEngine
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+
+#include <asm/machvec.h>
+#include <asm/rtc.h>
+#include <asm/machvec_init.h>
+
+#include <asm/se/io.h>
+
+void heartbeat_se(void);
+void setup_se(void);
+void init_se_IRQ(void);
+
+/*
+ * The Machine Vector
+ */
+
+struct sh_machine_vector mv_se __initmv = {
+#if defined(CONFIG_CPU_SH4)
+	.mv_nr_irqs		= 48,
+#elif defined(CONFIG_CPU_SUBTYPE_SH7708)
+	.mv_nr_irqs		= 32,
+#elif defined(CONFIG_CPU_SUBTYPE_SH7709)
+	.mv_nr_irqs		= 61,
+#elif defined(CONFIG_CPU_SUBTYPE_SH7705)
+	.mv_nr_irqs		= 86,
+#endif
+
+	.mv_inb			= se_inb,
+	.mv_inw			= se_inw,
+	.mv_inl			= se_inl,
+	.mv_outb		= se_outb,
+	.mv_outw		= se_outw,
+	.mv_outl		= se_outl,
+
+	.mv_inb_p		= se_inb_p,
+	.mv_inw_p		= se_inw,
+	.mv_inl_p		= se_inl,
+	.mv_outb_p		= se_outb_p,
+	.mv_outw_p		= se_outw,
+	.mv_outl_p		= se_outl,
+
+	.mv_insb		= se_insb,
+	.mv_insw		= se_insw,
+	.mv_insl		= se_insl,
+	.mv_outsb		= se_outsb,
+	.mv_outsw		= se_outsw,
+	.mv_outsl		= se_outsl,
+
+	.mv_isa_port2addr	= se_isa_port2addr,
+
+	.mv_init_irq		= init_se_IRQ,
+#ifdef CONFIG_HEARTBEAT
+	.mv_heartbeat		= heartbeat_se,
+#endif
+};
+ALIAS_MV(se)
diff --git a/arch/sh/boards/se/770x/setup.c b/arch/sh/boards/se/770x/setup.c
new file mode 100644
index 00000000000..2bed46fb607
--- /dev/null
+++ b/arch/sh/boards/se/770x/setup.c
@@ -0,0 +1,85 @@
+/* $Id: setup.c,v 1.1.2.4 2002/03/02 21:57:07 lethal Exp $
+ *
+ * linux/arch/sh/boards/se/770x/setup.c
+ *
+ * Copyright (C) 2000  Kazumoto Kojima
+ *
+ * Hitachi SolutionEngine Support.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+
+#include <linux/hdreg.h>
+#include <linux/ide.h>
+#include <asm/io.h>
+#include <asm/se/se.h>
+#include <asm/se/smc37c93x.h>
+
+/*
+ * Configure the Super I/O chip
+ */
+static void __init smsc_config(int index, int data)
+{
+	outb_p(index, INDEX_PORT);
+	outb_p(data, DATA_PORT);
+}
+
+static void __init init_smsc(void)
+{
+	outb_p(CONFIG_ENTER, CONFIG_PORT);
+	outb_p(CONFIG_ENTER, CONFIG_PORT);
+
+	/* FDC */
+	smsc_config(CURRENT_LDN_INDEX, LDN_FDC);
+	smsc_config(ACTIVATE_INDEX, 0x01);
+	smsc_config(IRQ_SELECT_INDEX, 6); /* IRQ6 */
+
+	/* IDE1 */
+	smsc_config(CURRENT_LDN_INDEX, LDN_IDE1);
+	smsc_config(ACTIVATE_INDEX, 0x01);
+	smsc_config(IRQ_SELECT_INDEX, 14); /* IRQ14 */
+
+	/* AUXIO (GPIO): to use IDE1 */
+	smsc_config(CURRENT_LDN_INDEX, LDN_AUXIO);
+	smsc_config(GPIO46_INDEX, 0x00); /* nIOROP */
+	smsc_config(GPIO47_INDEX, 0x00); /* nIOWOP */
+
+	/* COM1 */
+	smsc_config(CURRENT_LDN_INDEX, LDN_COM1);
+	smsc_config(ACTIVATE_INDEX, 0x01);
+	smsc_config(IO_BASE_HI_INDEX, 0x03);
+	smsc_config(IO_BASE_LO_INDEX, 0xf8);
+	smsc_config(IRQ_SELECT_INDEX, 4); /* IRQ4 */
+
+	/* COM2 */
+	smsc_config(CURRENT_LDN_INDEX, LDN_COM2);
+	smsc_config(ACTIVATE_INDEX, 0x01);
+	smsc_config(IO_BASE_HI_INDEX, 0x02);
+	smsc_config(IO_BASE_LO_INDEX, 0xf8);
+	smsc_config(IRQ_SELECT_INDEX, 3); /* IRQ3 */
+
+	/* RTC */
+	smsc_config(CURRENT_LDN_INDEX, LDN_RTC);
+	smsc_config(ACTIVATE_INDEX, 0x01);
+	smsc_config(IRQ_SELECT_INDEX, 8); /* IRQ8 */
+
+	/* XXX: PARPORT, KBD, and MOUSE will come here... */
+	outb_p(CONFIG_EXIT, CONFIG_PORT);
+}
+
+const char *get_system_type(void)
+{
+	return "SolutionEngine";
+}
+
+/*
+ * Initialize the board
+ */
+void __init platform_setup(void)
+{
+	init_smsc();
+	/* XXX: RTC setting comes here */
+}
diff --git a/arch/sh/boards/se/7751/Makefile b/arch/sh/boards/se/7751/Makefile
new file mode 100644
index 00000000000..ce7ca247f84
--- /dev/null
+++ b/arch/sh/boards/se/7751/Makefile
@@ -0,0 +1,8 @@
+#
+# Makefile for the 7751 SolutionEngine specific parts of the kernel
+#
+
+obj-y	 := mach.o setup.o io.o irq.o led.o
+
+obj-$(CONFIG_PCI) += pci.o
+
diff --git a/arch/sh/boards/se/7751/io.c b/arch/sh/boards/se/7751/io.c
new file mode 100644
index 00000000000..99041b26926
--- /dev/null
+++ b/arch/sh/boards/se/7751/io.c
@@ -0,0 +1,244 @@
+/* 
+ * linux/arch/sh/kernel/io_7751se.c
+ *
+ * Copyright (C) 2001  Ian da Silva, Jeremy Siegel
+ * Based largely on io_se.c.
+ *
+ * I/O routine for Hitachi 7751 SolutionEngine.
+ *
+ * Initial version only to support LAN access; some
+ * placeholder code from io_se.c left in with the
+ * expectation of later SuperIO and PCMCIA access.
+ */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <asm/io.h>
+#include <asm/se7751/se7751.h>
+#include <asm/addrspace.h>
+
+#include <linux/pci.h>
+#include "../../../drivers/pci/pci-sh7751.h"
+
+#if 0
+/******************************************************************
+ * Variables from io_se.c, related to PCMCIA (not PCI); we're not
+ * compiling them in, and have removed references from functions
+ * which follow.  [Many checked for IO ports in the range bounded
+ * by sh_pcic_io_start/stop, and used sh_pcic_io_wbase as offset.
+ * As start/stop are uninitialized, only port 0x0 would match?]
+ * When used, remember to adjust names to avoid clash with io_se?
+ *****************************************************************/
+/* SH pcmcia io window base, start and end.  */
+int sh_pcic_io_wbase = 0xb8400000;
+int sh_pcic_io_start;
+int sh_pcic_io_stop;
+int sh_pcic_io_type;
+int sh_pcic_io_dummy;
+/*************************************************************/
+#endif
+
+/*
+ * The 7751 Solution Engine uses the built-in PCI controller (PCIC)
+ * of the 7751 processor, and has a SuperIO accessible via the PCI.
+ * The board also includes a PCMCIA controller on its memory bus,
+ * like the other Solution Engine boards.
+ */ 
+
+#define PCIIOBR		(volatile long *)PCI_REG(SH7751_PCIIOBR)
+#define PCIMBR          (volatile long *)PCI_REG(SH7751_PCIMBR)
+#define PCI_IO_AREA	SH7751_PCI_IO_BASE
+#define PCI_MEM_AREA	SH7751_PCI_CONFIG_BASE
+
+#define PCI_IOMAP(adr)	(PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
+
+#define maybebadio(name,port) \
+  printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \
+	 #name, (port), (__u32) __builtin_return_address(0))
+
+static inline void delay(void)
+{
+	ctrl_inw(0xa0000000);
+}
+
+static inline volatile __u16 *
+port2adr(unsigned int port)
+{
+	if (port >= 0x2000)
+		return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000));
+#if 0
+	else
+		return (volatile __u16 *) (PA_SUPERIO + (port << 1));
+#endif
+	maybebadio(name,(unsigned long)port);
+	return (volatile __u16*)port;
+}
+
+#if 0
+/* The 7751 Solution Engine seems to have everything hooked */
+/* up pretty normally (nothing on high-bytes only...) so this */
+/* shouldn't be needed */
+static inline int
+shifted_port(unsigned long port)
+{
+	/* For IDE registers, value is not shifted */
+	if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
+		return 0;
+	else
+		return 1;
+}
+#endif
+
+/* In case someone configures the kernel w/o PCI support: in that */
+/* scenario, don't ever bother to check for PCI-window addresses */
+
+/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */
+#if defined(CONFIG_PCI)
+#define CHECK_SH7751_PCIIO(port) \
+  ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE)))
+#else
+#define CHECK_SH7751_PCIIO(port) (0)
+#endif
+
+/*
+ * General outline: remap really low stuff [eventually] to SuperIO,
+ * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
+ * is mapped through the PCI IO window.  Stuff with high bits (PXSEG)
+ * should be way beyond the window, and is used  w/o translation for
+ * compatibility.
+ */
+unsigned char sh7751se_inb(unsigned long port)
+{
+	if (PXSEG(port))
+		return *(volatile unsigned char *)port;
+	else if (CHECK_SH7751_PCIIO(port))
+		return *(volatile unsigned char *)PCI_IOMAP(port);
+	else
+		return (*port2adr(port))&0xff; 
+}
+
+unsigned char sh7751se_inb_p(unsigned long port)
+{
+	unsigned char v;
+
+        if (PXSEG(port))
+                v = *(volatile unsigned char *)port;
+	else if (CHECK_SH7751_PCIIO(port))
+                v = *(volatile unsigned char *)PCI_IOMAP(port);
+	else
+		v = (*port2adr(port))&0xff; 
+	delay();
+	return v;
+}
+
+unsigned short sh7751se_inw(unsigned long port)
+{
+        if (PXSEG(port))
+                return *(volatile unsigned short *)port;
+	else if (CHECK_SH7751_PCIIO(port))
+                return *(volatile unsigned short *)PCI_IOMAP(port);
+	else if (port >= 0x2000)
+		return *port2adr(port);
+	else
+		maybebadio(inw, port);
+	return 0;
+}
+
+unsigned int sh7751se_inl(unsigned long port)
+{
+        if (PXSEG(port))
+                return *(volatile unsigned long *)port;
+	else if (CHECK_SH7751_PCIIO(port))
+                return *(volatile unsigned int *)PCI_IOMAP(port);
+	else if (port >= 0x2000)
+		return *port2adr(port);
+	else
+		maybebadio(inl, port);
+	return 0;
+}
+
+void sh7751se_outb(unsigned char value, unsigned long port)
+{
+
+        if (PXSEG(port))
+                *(volatile unsigned char *)port = value;
+	else if (CHECK_SH7751_PCIIO(port))
+        	*((unsigned char*)PCI_IOMAP(port)) = value;
+	else
+		*(port2adr(port)) = value;
+}
+
+void sh7751se_outb_p(unsigned char value, unsigned long port)
+{
+        if (PXSEG(port))
+                *(volatile unsigned char *)port = value;
+	else if (CHECK_SH7751_PCIIO(port))
+        	*((unsigned char*)PCI_IOMAP(port)) = value;
+	else
+		*(port2adr(port)) = value;
+	delay();
+}
+
+void sh7751se_outw(unsigned short value, unsigned long port)
+{
+        if (PXSEG(port))
+                *(volatile unsigned short *)port = value;
+	else if (CHECK_SH7751_PCIIO(port))
+        	*((unsigned short *)PCI_IOMAP(port)) = value;
+	else if (port >= 0x2000)
+		*port2adr(port) = value;
+	else
+		maybebadio(outw, port);
+}
+
+void sh7751se_outl(unsigned int value, unsigned long port)
+{
+        if (PXSEG(port))
+                *(volatile unsigned long *)port = value;
+	else if (CHECK_SH7751_PCIIO(port))
+        	*((unsigned long*)PCI_IOMAP(port)) = value;
+	else
+		maybebadio(outl, port);
+}
+
+void sh7751se_insl(unsigned long port, void *addr, unsigned long count)
+{
+	maybebadio(insl, port);
+}
+
+void sh7751se_outsl(unsigned long port, const void *addr, unsigned long count)
+{
+	maybebadio(outsw, port);
+}
+
+/* Map ISA bus address to the real address. Only for PCMCIA.  */
+
+/* ISA page descriptor.  */
+static __u32 sh_isa_memmap[256];
+
+#if 0
+static int
+sh_isa_mmap(__u32 start, __u32 length, __u32 offset)
+{
+	int idx;
+
+	if (start >= 0x100000 || (start & 0xfff) || (length != 0x1000))
+		return -1;
+
+	idx = start >> 12;
+	sh_isa_memmap[idx] = 0xb8000000 + (offset &~ 0xfff);
+	printk("sh_isa_mmap: start %x len %x offset %x (idx %x paddr %x)\n",
+	       start, length, offset, idx, sh_isa_memmap[idx]);
+	return 0;
+}
+#endif
+
+unsigned long
+sh7751se_isa_port2addr(unsigned long offset)
+{
+	int idx;
+
+	idx = (offset >> 12) & 0xff;
+	offset &= 0xfff;
+	return sh_isa_memmap[idx] + offset;
+}
diff --git a/arch/sh/boards/se/7751/irq.c b/arch/sh/boards/se/7751/irq.c
new file mode 100644
index 00000000000..ad71f3e66c1
--- /dev/null
+++ b/arch/sh/boards/se/7751/irq.c
@@ -0,0 +1,67 @@
+/*
+ * linux/arch/sh/boards/se/7751/irq.c
+ *
+ * Copyright (C) 2000  Kazumoto Kojima
+ *
+ * Hitachi SolutionEngine Support.
+ *
+ * Modified for 7751 Solution Engine by
+ * Ian da Silva and Jeremy Siegel, 2001.
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <asm/irq.h>
+#include <asm/se7751/se7751.h>
+
+/*
+ * Initialize IRQ setting
+ */
+void __init init_7751se_IRQ(void)
+{
+
+  /* Leave old Solution Engine code in for reference. */
+#if defined(CONFIG_SH_SOLUTION_ENGINE)
+        /*
+         * Super I/O (Just mimic PC):
+         *  1: keyboard
+         *  3: serial 0
+         *  4: serial 1
+         *  5: printer
+         *  6: floppy
+         *  8: rtc
+         * 12: mouse
+         * 14: ide0
+         */
+        make_ipr_irq(14, BCR_ILCRA, 2, 0x0f-14);
+        make_ipr_irq(12, BCR_ILCRA, 1, 0x0f-12);
+        make_ipr_irq( 8, BCR_ILCRB, 1, 0x0f- 8);
+        make_ipr_irq( 6, BCR_ILCRC, 3, 0x0f- 6);
+        make_ipr_irq( 5, BCR_ILCRC, 2, 0x0f- 5);
+        make_ipr_irq( 4, BCR_ILCRC, 1, 0x0f- 4);
+        make_ipr_irq( 3, BCR_ILCRC, 0, 0x0f- 3);
+        make_ipr_irq( 1, BCR_ILCRD, 3, 0x0f- 1);
+
+        make_ipr_irq(10, BCR_ILCRD, 1, 0x0f-10); /* LAN */
+
+        make_ipr_irq( 0, BCR_ILCRE, 3, 0x0f- 0); /* PCIRQ3 */
+        make_ipr_irq(11, BCR_ILCRE, 2, 0x0f-11); /* PCIRQ2 */
+        make_ipr_irq( 9, BCR_ILCRE, 1, 0x0f- 9); /* PCIRQ1 */
+        make_ipr_irq( 7, BCR_ILCRE, 0, 0x0f- 7); /* PCIRQ0 */
+
+        /* #2, #13 are allocated for SLOT IRQ #1 and #2 (for now) */
+        /* NOTE: #2 and #13 are not used on PC */
+        make_ipr_irq(13, BCR_ILCRG, 1, 0x0f-13); /* SLOTIRQ2 */
+        make_ipr_irq( 2, BCR_ILCRG, 0, 0x0f- 2); /* SLOTIRQ1 */
+
+#elif defined(CONFIG_SH_7751_SOLUTION_ENGINE)
+
+        make_ipr_irq(13, BCR_ILCRD, 3, 2);
+
+        /* Add additional calls to make_ipr_irq() as drivers are added
+         * and tested.
+         */
+#endif
+
+}
diff --git a/arch/sh/boards/se/7751/led.c b/arch/sh/boards/se/7751/led.c
new file mode 100644
index 00000000000..0c788230cf8
--- /dev/null
+++ b/arch/sh/boards/se/7751/led.c
@@ -0,0 +1,68 @@
+/*
+ * linux/arch/sh/kernel/led_se.c
+ *
+ * Copyright (C) 2000 Stuart Menefy <stuart.menefy@st.com>
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License.  See linux/COPYING for more information.
+ *
+ * This file contains Solution Engine specific LED code.
+ */
+
+#include <linux/config.h>
+#include <asm/se7751/se7751.h>
+
+static void mach_led(int position, int value)
+{
+	volatile unsigned short* p = (volatile unsigned short*)PA_LED;
+
+	if (value) {
+		*p |= (1<<8);
+	} else {
+		*p &= ~(1<<8);
+	}
+}
+
+#ifdef CONFIG_HEARTBEAT
+
+#include <linux/sched.h>
+
+/* Cycle the LED's in the clasic Knightrider/Sun pattern */
+void heartbeat_7751se(void)
+{
+	static unsigned int cnt = 0, period = 0;
+	volatile unsigned short* p = (volatile unsigned short*)PA_LED;
+	static unsigned bit = 0, up = 1;
+
+	cnt += 1;
+	if (cnt < period) {
+		return;
+	}
+
+	cnt = 0;
+
+	/* Go through the points (roughly!):
+	 * f(0)=10, f(1)=16, f(2)=20, f(5)=35,f(inf)->110
+	 */
+	period = 110 - ( (300<<FSHIFT)/
+			 ((avenrun[0]/5) + (3<<FSHIFT)) );
+
+	if (up) {
+		if (bit == 7) {
+			bit--;
+			up=0;
+		} else {
+			bit ++;
+		}
+	} else {
+		if (bit == 0) {
+			bit++;
+			up=1;
+		} else {
+			bit--;
+		}
+	}
+	*p = 1<<(bit+8);
+
+}
+#endif /* CONFIG_HEARTBEAT */
diff --git a/arch/sh/boards/se/7751/mach.c b/arch/sh/boards/se/7751/mach.c
new file mode 100644
index 00000000000..16d386b7e3b
--- /dev/null
+++ b/arch/sh/boards/se/7751/mach.c
@@ -0,0 +1,55 @@
+/*
+ * linux/arch/sh/kernel/mach_7751se.c
+ *
+ * Minor tweak of mach_se.c file to reference 7751se-specific items.
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License.  See linux/COPYING for more information.
+ *
+ * Machine vector for the Hitachi 7751 SolutionEngine
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+
+#include <asm/machvec.h>
+#include <asm/rtc.h>
+#include <asm/machvec_init.h>
+
+#include <asm/se7751/io.h>
+
+void heartbeat_7751se(void);
+void init_7751se_IRQ(void);
+
+/*
+ * The Machine Vector
+ */
+
+struct sh_machine_vector mv_7751se __initmv = {
+	.mv_nr_irqs		= 72,
+
+	.mv_inb			= sh7751se_inb,
+	.mv_inw			= sh7751se_inw,
+	.mv_inl			= sh7751se_inl,
+	.mv_outb		= sh7751se_outb,
+	.mv_outw		= sh7751se_outw,
+	.mv_outl		= sh7751se_outl,
+
+	.mv_inb_p		= sh7751se_inb_p,
+	.mv_inw_p		= sh7751se_inw,
+	.mv_inl_p		= sh7751se_inl,
+	.mv_outb_p		= sh7751se_outb_p,
+	.mv_outw_p		= sh7751se_outw,
+	.mv_outl_p		= sh7751se_outl,
+
+	.mv_insl		= sh7751se_insl,
+	.mv_outsl		= sh7751se_outsl,
+
+	.mv_isa_port2addr	= sh7751se_isa_port2addr,
+
+	.mv_init_irq		= init_7751se_IRQ,
+#ifdef CONFIG_HEARTBEAT
+	.mv_heartbeat		= heartbeat_7751se,
+#endif
+};
+ALIAS_MV(7751se)
diff --git a/arch/sh/boards/se/7751/pci.c b/arch/sh/boards/se/7751/pci.c
new file mode 100644
index 00000000000..1f273efd2cf
--- /dev/null
+++ b/arch/sh/boards/se/7751/pci.c
@@ -0,0 +1,148 @@
+/*
+ * linux/arch/sh/kernel/pci-7751se.c
+ *
+ * Author:  Ian DaSilva (idasilva@mvista.com)
+ *
+ * Highly leveraged from pci-bigsur.c, written by Dustin McIntire.
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License.  See linux/COPYING for more information.
+ *
+ * PCI initialization for the Hitachi SH7751 Solution Engine board (MS7751SE01)
+ */
+
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/pci.h>
+
+#include <asm/io.h>
+#include "../../../drivers/pci/pci-sh7751.h"
+
+#define PCIMCR_MRSET_OFF	0xBFFFFFFF
+#define PCIMCR_RFSH_OFF		0xFFFFFFFB
+
+/*
+ * Only long word accesses of the PCIC's internal local registers and the
+ * configuration registers from the CPU is supported.
+ */
+#define PCIC_WRITE(x,v) writel((v), PCI_REG(x))
+#define PCIC_READ(x) readl(PCI_REG(x))
+
+/*
+ * Description:  This function sets up and initializes the pcic, sets
+ * up the BARS, maps the DRAM into the address space etc, etc.
+ */
+int __init pcibios_init_platform(void)
+{
+   unsigned long bcr1, wcr1, wcr2, wcr3, mcr;
+   unsigned short bcr2;
+
+   /*
+    * Initialize the slave bus controller on the pcic.  The values used
+    * here should not be hardcoded, but they should be taken from the bsc
+    * on the processor, to make this function as generic as possible.
+    * (i.e. Another sbc may usr different SDRAM timing settings -- in order
+    * for the pcic to work, its settings need to be exactly the same.)
+    */
+   bcr1 = (*(volatile unsigned long*)(SH7751_BCR1));
+   bcr2 = (*(volatile unsigned short*)(SH7751_BCR2));
+   wcr1 = (*(volatile unsigned long*)(SH7751_WCR1));
+   wcr2 = (*(volatile unsigned long*)(SH7751_WCR2));
+   wcr3 = (*(volatile unsigned long*)(SH7751_WCR3));
+   mcr = (*(volatile unsigned long*)(SH7751_MCR));
+
+   bcr1 = bcr1 | 0x00080000;  /* Enable Bit 19, BREQEN */
+   (*(volatile unsigned long*)(SH7751_BCR1)) = bcr1;   
+
+   bcr1 = bcr1 | 0x40080000;  /* Enable Bit 19 BREQEN, set PCIC to slave */
+   PCIC_WRITE(SH7751_PCIBCR1, bcr1);	 /* PCIC BCR1 */
+   PCIC_WRITE(SH7751_PCIBCR2, bcr2);     /* PCIC BCR2 */
+   PCIC_WRITE(SH7751_PCIWCR1, wcr1);     /* PCIC WCR1 */
+   PCIC_WRITE(SH7751_PCIWCR2, wcr2);     /* PCIC WCR2 */
+   PCIC_WRITE(SH7751_PCIWCR3, wcr3);     /* PCIC WCR3 */
+   mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF;
+   PCIC_WRITE(SH7751_PCIMCR, mcr);      /* PCIC MCR */
+
+
+   /* Enable all interrupts, so we know what to fix */
+   PCIC_WRITE(SH7751_PCIINTM, 0x0000c3ff);
+   PCIC_WRITE(SH7751_PCIAINTM, 0x0000380f);
+
+   /* Set up standard PCI config registers */
+   PCIC_WRITE(SH7751_PCICONF1, 	0xF39000C7); /* Bus Master, Mem & I/O access */
+   PCIC_WRITE(SH7751_PCICONF2, 	0x00000000); /* PCI Class code & Revision ID */
+   PCIC_WRITE(SH7751_PCICONF4, 	0xab000001); /* PCI I/O address (local regs) */
+   PCIC_WRITE(SH7751_PCICONF5, 	0x0c000000); /* PCI MEM address (local RAM)  */
+   PCIC_WRITE(SH7751_PCICONF6, 	0xd0000000); /* PCI MEM address (unused)     */
+   PCIC_WRITE(SH7751_PCICONF11, 0x35051054); /* PCI Subsystem ID & Vendor ID */
+   PCIC_WRITE(SH7751_PCILSR0, 0x03f00000);   /* MEM (full 64M exposed)       */
+   PCIC_WRITE(SH7751_PCILSR1, 0x00000000);   /* MEM (unused)                 */
+   PCIC_WRITE(SH7751_PCILAR0, 0x0c000000);   /* MEM (direct map from PCI)    */
+   PCIC_WRITE(SH7751_PCILAR1, 0x00000000);   /* MEM (unused)                 */
+
+   /* Now turn it on... */
+   PCIC_WRITE(SH7751_PCICR, 0xa5000001);
+
+   /*
+    * Set PCIMBR and PCIIOBR here, assuming a single window
+    * (16M MEM, 256K IO) is enough.  If a larger space is
+    * needed, the readx/writex and inx/outx functions will
+    * have to do more (e.g. setting registers for each call).
+    */
+
+   /*
+    * Set the MBR so PCI address is one-to-one with window,
+    * meaning all calls go straight through... use BUG_ON to
+    * catch erroneous assumption.
+    */
+   BUG_ON(PCIBIOS_MIN_MEM != SH7751_PCI_MEMORY_BASE);
+
+   PCIC_WRITE(SH7751_PCIMBR, PCIBIOS_MIN_MEM);
+
+   /* Set IOBR for window containing area specified in pci.h */
+   PCIC_WRITE(SH7751_PCIIOBR, (PCIBIOS_MIN_IO & SH7751_PCIIOBR_MASK));
+
+   /* All done, may as well say so... */
+   printk("SH7751 PCI: Finished initialization of the PCI controller\n");
+
+   return 1;
+}
+
+int __init pcibios_map_platform_irq(u8 slot, u8 pin)
+{
+        switch (slot) {
+        case 0: return 13;
+        case 1: return 13; 	/* AMD Ethernet controller */
+        case 2: return -1;
+        case 3: return -1;
+        case 4: return -1;
+        default:
+                printk("PCI: Bad IRQ mapping request for slot %d\n", slot);
+                return -1;
+        }
+}
+
+static struct resource sh7751_io_resource = {
+	.name   = "SH7751 IO",
+	.start  = SH7751_PCI_IO_BASE,
+	.end    = SH7751_PCI_IO_BASE + SH7751_PCI_IO_SIZE - 1,
+	.flags  = IORESOURCE_IO
+};
+
+static struct resource sh7751_mem_resource = {
+	.name   = "SH7751 mem",
+	.start  = SH7751_PCI_MEMORY_BASE,
+	.end    = SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1,
+	.flags  = IORESOURCE_MEM
+};
+
+extern struct pci_ops sh7751_pci_ops;
+
+struct pci_channel board_pci_channels[] = {
+	{ &sh7751_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },
+	{ NULL, NULL, NULL, 0, 0 },
+};
+
diff --git a/arch/sh/boards/se/7751/setup.c b/arch/sh/boards/se/7751/setup.c
new file mode 100644
index 00000000000..9d111bb884f
--- /dev/null
+++ b/arch/sh/boards/se/7751/setup.c
@@ -0,0 +1,228 @@
+/* 
+ * linux/arch/sh/kernel/setup_7751se.c
+ *
+ * Copyright (C) 2000  Kazumoto Kojima
+ *
+ * Hitachi SolutionEngine Support.
+ *
+ * Modified for 7751 Solution Engine by
+ * Ian da Silva and Jeremy Siegel, 2001.
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+
+#include <linux/hdreg.h>
+#include <linux/ide.h>
+#include <asm/io.h>
+#include <asm/se7751/se7751.h>
+
+#ifdef CONFIG_SH_KGDB
+#include <asm/kgdb.h>
+#endif
+
+/*
+ * Configure the Super I/O chip
+ */
+#if 0
+/* Leftover code from regular Solution Engine, for reference. */
+/* The SH7751 Solution Engine has a different SuperIO. */
+static void __init smsc_config(int index, int data)
+{
+	outb_p(index, INDEX_PORT);
+	outb_p(data, DATA_PORT);
+}
+
+static void __init init_smsc(void)
+{
+	outb_p(CONFIG_ENTER, CONFIG_PORT);
+	outb_p(CONFIG_ENTER, CONFIG_PORT);
+
+	/* FDC */
+	smsc_config(CURRENT_LDN_INDEX, LDN_FDC);
+	smsc_config(ACTIVATE_INDEX, 0x01);
+	smsc_config(IRQ_SELECT_INDEX, 6); /* IRQ6 */
+
+	/* IDE1 */
+	smsc_config(CURRENT_LDN_INDEX, LDN_IDE1);
+	smsc_config(ACTIVATE_INDEX, 0x01);
+	smsc_config(IRQ_SELECT_INDEX, 14); /* IRQ14 */
+
+	/* AUXIO (GPIO): to use IDE1 */
+	smsc_config(CURRENT_LDN_INDEX, LDN_AUXIO);
+	smsc_config(GPIO46_INDEX, 0x00); /* nIOROP */
+	smsc_config(GPIO47_INDEX, 0x00); /* nIOWOP */
+
+	/* COM1 */
+	smsc_config(CURRENT_LDN_INDEX, LDN_COM1);
+	smsc_config(ACTIVATE_INDEX, 0x01);
+	smsc_config(IO_BASE_HI_INDEX, 0x03);
+	smsc_config(IO_BASE_LO_INDEX, 0xf8);
+	smsc_config(IRQ_SELECT_INDEX, 4); /* IRQ4 */
+
+	/* COM2 */
+	smsc_config(CURRENT_LDN_INDEX, LDN_COM2);
+	smsc_config(ACTIVATE_INDEX, 0x01);
+	smsc_config(IO_BASE_HI_INDEX, 0x02);
+	smsc_config(IO_BASE_LO_INDEX, 0xf8);
+	smsc_config(IRQ_SELECT_INDEX, 3); /* IRQ3 */
+
+	/* RTC */
+	smsc_config(CURRENT_LDN_INDEX, LDN_RTC);
+	smsc_config(ACTIVATE_INDEX, 0x01);
+	smsc_config(IRQ_SELECT_INDEX, 8); /* IRQ8 */
+
+	/* XXX: PARPORT, KBD, and MOUSE will come here... */
+	outb_p(CONFIG_EXIT, CONFIG_PORT);
+}
+#endif
+
+const char *get_system_type(void)
+{
+	return "7751 SolutionEngine";
+}
+
+#ifdef CONFIG_SH_KGDB
+static int kgdb_uart_setup(void);
+static struct kgdb_sermap kgdb_uart_sermap = 
+{ "ttyS", 0, kgdb_uart_setup, NULL };
+#endif
+ 
+/*
+ * Initialize the board
+ */
+void __init platform_setup(void)
+{
+	/* Call init_smsc() replacement to set up SuperIO. */
+	/* XXX: RTC setting comes here */
+#ifdef CONFIG_SH_KGDB
+	kgdb_register_sermap(&kgdb_uart_sermap);
+#endif
+}
+
+/*********************************************************************
+ * Currently a hack (e.g. does not interact well w/serial.c, lots of *
+ * hardcoded stuff) but may be useful if SCI/F needs debugging.      *
+ * Mostly copied from x86 code (see files asm-i386/kgdb_local.h and  *
+ * arch/i386/lib/kgdb_serial.c).                                     *
+ *********************************************************************/
+
+#ifdef CONFIG_SH_KGDB
+#include <linux/types.h>
+#include <linux/serial.h>
+#include <linux/serialP.h>
+#include <linux/serial_reg.h>
+
+#define COM1_PORT 0x3f8  /* Base I/O address */
+#define COM1_IRQ  4      /* IRQ not used yet */
+#define COM2_PORT 0x2f8  /* Base I/O address */
+#define COM2_IRQ  3      /* IRQ not used yet */
+
+#define SB_CLOCK 1843200 /* Serial baud clock */
+#define SB_BASE (SB_CLOCK/16)
+#define SB_MCR UART_MCR_OUT2 | UART_MCR_DTR | UART_MCR_RTS
+
+struct uart_port {
+	int base;
+};
+#define UART_NPORTS 2
+struct uart_port uart_ports[] = {
+	{ COM1_PORT },
+	{ COM2_PORT },
+};
+struct uart_port *kgdb_uart_port;
+
+#define UART_IN(reg)	inb_p(kgdb_uart_port->base + reg)
+#define UART_OUT(reg,v)	outb_p((v), kgdb_uart_port->base + reg)
+
+/* Basic read/write functions for the UART */
+#define UART_LSR_RXCERR    (UART_LSR_BI | UART_LSR_FE | UART_LSR_PE)
+static int kgdb_uart_getchar(void)
+{
+	int lsr;
+	int c = -1;
+
+	while (c == -1) {
+		lsr = UART_IN(UART_LSR);
+		if (lsr & UART_LSR_DR) 
+			c = UART_IN(UART_RX);
+		if ((lsr & UART_LSR_RXCERR))
+			c = -1;
+	}
+	return c;
+}
+
+static void kgdb_uart_putchar(int c)
+{
+	while ((UART_IN(UART_LSR) & UART_LSR_THRE) == 0)
+		;
+	UART_OUT(UART_TX, c);
+}
+
+/*
+ * Initialize UART to configured/requested values.
+ * (But we don't interrupts yet, or interact w/serial.c)
+ */
+static int kgdb_uart_setup(void)
+{
+	int port;
+	int lcr = 0;
+	int bdiv = 0;
+
+	if (kgdb_portnum >= UART_NPORTS) {
+		KGDB_PRINTK("uart port %d invalid.\n", kgdb_portnum);
+		return -1;
+	}
+
+	kgdb_uart_port = &uart_ports[kgdb_portnum];
+
+	/* Init sequence from gdb_hook_interrupt */
+	UART_IN(UART_RX);
+	UART_OUT(UART_IER, 0);
+
+	UART_IN(UART_RX);	/* Serial driver comments say */
+	UART_IN(UART_IIR);	/* this clears interrupt regs */
+	UART_IN(UART_MSR);
+
+	/* Figure basic LCR values */
+	switch (kgdb_bits) {
+	case '7':
+		lcr |= UART_LCR_WLEN7;
+		break;
+	default: case '8': 
+		lcr |= UART_LCR_WLEN8;
+		break;
+	}
+	switch (kgdb_parity) {
+	case 'O':
+		lcr |= UART_LCR_PARITY;
+		break;
+	case 'E':
+		lcr |= (UART_LCR_PARITY | UART_LCR_EPAR);
+		break;
+	default: break;
+	}
+
+	/* Figure the baud rate divisor */
+	bdiv = (SB_BASE/kgdb_baud);
+	
+	/* Set the baud rate and LCR values */
+	UART_OUT(UART_LCR, (lcr | UART_LCR_DLAB));
+	UART_OUT(UART_DLL, (bdiv & 0xff));
+	UART_OUT(UART_DLM, ((bdiv >> 8) & 0xff));
+	UART_OUT(UART_LCR, lcr);
+
+	/* Set the MCR */
+	UART_OUT(UART_MCR, SB_MCR);
+
+	/* Turn off FIFOs for now */
+	UART_OUT(UART_FCR, 0);
+
+	/* Setup complete: initialize function pointers */
+	kgdb_getchar = kgdb_uart_getchar;
+	kgdb_putchar = kgdb_uart_putchar;
+
+	return 0;
+}
+#endif /* CONFIG_SH_KGDB */