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authorHeiko Carstens <heiko.carstens@de.ibm.com>2010-07-27 19:29:37 +0200
committerMartin Schwidefsky <sky@mschwide.boeblingen.de.ibm.com>2010-07-27 19:29:42 +0200
commitf5cdac274c62ab61874374abb60f2310ab979295 (patch)
tree9d0c444bc91f6b84d4e15552ebdea7aaf95510c2 /arch/s390
parent1a041a23da7c77b53c71fe11b4f940388bee37b1 (diff)
[S390] Fix IRQ tracing in case of PER
In case user space is single stepped (PER) the program check handler claims too early that IRQs are enabled on the return path. Subsequent checks will notice that the IRQ mask in the PSW and what lockdep thinks the IRQ mask should be do not correlate and therefore will print a warning to the console and disable lockdep. Fix this by doing all the work within the correct context. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'arch/s390')
-rw-r--r--arch/s390/kernel/entry.S12
-rw-r--r--arch/s390/kernel/entry64.S12
2 files changed, 20 insertions, 4 deletions
diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S
index d5e3e600744..bea9ee37ac9 100644
--- a/arch/s390/kernel/entry.S
+++ b/arch/s390/kernel/entry.S
@@ -535,8 +535,16 @@ pgm_no_vtime2:
l %r3,__LC_PGM_ILC # load program interruption code
la %r8,0x7f
nr %r8,%r3 # clear per-event-bit and ilc
- be BASED(pgm_exit) # only per or per+check ?
- b BASED(pgm_do_call)
+ be BASED(pgm_exit2) # only per or per+check ?
+ l %r7,BASED(.Ljump_table)
+ sll %r8,2
+ l %r7,0(%r8,%r7) # load address of handler routine
+ la %r2,SP_PTREGS(%r15) # address of register-save area
+ basr %r14,%r7 # branch to interrupt-handler
+pgm_exit2:
+ TRACE_IRQS_ON
+ stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
+ b BASED(sysc_return)
#
# it was a single stepped SVC that is causing all the trouble
diff --git a/arch/s390/kernel/entry64.S b/arch/s390/kernel/entry64.S
index e7192e1cb67..8bccec15ea9 100644
--- a/arch/s390/kernel/entry64.S
+++ b/arch/s390/kernel/entry64.S
@@ -544,8 +544,16 @@ pgm_no_vtime2:
lgf %r3,__LC_PGM_ILC # load program interruption code
lghi %r8,0x7f
ngr %r8,%r3 # clear per-event-bit and ilc
- je pgm_exit
- j pgm_do_call
+ je pgm_exit2
+ sll %r8,3
+ larl %r1,pgm_check_table
+ lg %r1,0(%r8,%r1) # load address of handler routine
+ la %r2,SP_PTREGS(%r15) # address of register-save area
+ basr %r14,%r1 # branch to interrupt-handler
+pgm_exit2:
+ TRACE_IRQS_ON
+ stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
+ j sysc_return
#
# it was a single stepped SVC that is causing all the trouble