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authorJimi Xenidis <jimix@pobox.com>2011-09-23 05:40:46 +0000
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2011-09-29 16:58:22 +1000
commit66857b3a9e88ac6f6e279eaa06b84367e662c0dd (patch)
treebeae75afef05fc761d338f3ec9d238d60ffa4008 /arch/powerpc
parentbb36c44557a4fcbaa17c0f2776e12a05a691b432 (diff)
powerpc: Fix xmon for systems without MSR[RI]
Based on patch by David Gibson <dwg@au1.ibm.com> xmon has a longstanding bug on systems which are SMP-capable but lack the MSR[RI] bit. In these cases, xmon invoked by IPI on secondary CPUs will not properly keep quiet, but will print stuff, thereby garbling the primary xmon's output. This patch fixes it, by ignoring the RI bit if the processor does not support it. There's already a version of this for 4xx upstream, which we'll need to extend to other RI-lacking CPUs at some point. For now this adds Book3e processors to the mix. Signed-off-by: Jimi Xenidis <jimix@pobox.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc')
-rw-r--r--arch/powerpc/xmon/xmon.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 42541bbcc7f..13f82f84766 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -340,8 +340,8 @@ int cpus_are_in_xmon(void)
static inline int unrecoverable_excp(struct pt_regs *regs)
{
-#ifdef CONFIG_4xx
- /* We have no MSR_RI bit on 4xx, so we simply return false */
+#if defined(CONFIG_4xx) || defined(CONFIG_BOOK3E)
+ /* We have no MSR_RI bit on 4xx or Book3e, so we simply return false */
return 0;
#else
return ((regs->msr & MSR_RI) == 0);