diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-09-15 09:51:09 -0700 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-09-15 09:51:09 -0700 |
commit | 723e9db7a46e328527cc3da2b478b831184fe828 (patch) | |
tree | cdeda255633057dcb4c84097bed27b2bbf76970f /arch/powerpc/platforms | |
parent | ada3fa15057205b7d3f727bba5cd26b5912e350f (diff) | |
parent | d331d8305cba713605854aab63a000fb892353a7 (diff) |
Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (134 commits)
powerpc/nvram: Enable use Generic NVRAM driver for different size chips
powerpc/iseries: Fix oops reading from /proc/iSeries/mf/*/cmdline
powerpc/ps3: Workaround for flash memory I/O error
powerpc/booke: Don't set DABR on 64-bit BookE, use DAC1 instead
powerpc/perf_counters: Reduce stack usage of power_check_constraints
powerpc: Fix bug where perf_counters breaks oprofile
powerpc/85xx: Fix SMP compile error and allow NULL for smp_ops
powerpc/irq: Improve nanodoc
powerpc: Fix some late PowerMac G5 with PCIe ATI graphics
powerpc/fsl-booke: Use HW PTE format if CONFIG_PTE_64BIT
powerpc/book3e: Add missing page sizes
powerpc/pseries: Fix to handle slb resize across migration
powerpc/powermac: Thermal control turns system off too eagerly
powerpc/pci: Merge ppc32 and ppc64 versions of phb_scan()
powerpc/405ex: support cuImage via included dtb
powerpc/405ex: provide necessary fixup function to support cuImage
powerpc/40x: Add support for the ESTeem 195E (PPC405EP) SBC
powerpc/44x: Add Eiger AMCC (AppliedMicro) PPC460SX evaluation board support.
powerpc/44x: Update Arches defconfig
powerpc/44x: Update Arches dts
...
Fix up conflicts in drivers/char/agp/uninorth-agp.c
Diffstat (limited to 'arch/powerpc/platforms')
47 files changed, 579 insertions, 402 deletions
diff --git a/arch/powerpc/platforms/40x/Kconfig b/arch/powerpc/platforms/40x/Kconfig index a6e43cb6f82..ec64264f7a5 100644 --- a/arch/powerpc/platforms/40x/Kconfig +++ b/arch/powerpc/platforms/40x/Kconfig @@ -40,6 +40,16 @@ config HCU4 help This option enables support for the Nestal Maschinen HCU4 board. +config HOTFOOT + bool "Hotfoot" + depends on 40x + default n + select 405EP + select PPC40x_SIMPLE + select PCI + help + This option enables support for the ESTEEM 195E Hotfoot board. + config KILAUEA bool "Kilauea" depends on 40x diff --git a/arch/powerpc/platforms/40x/ppc40x_simple.c b/arch/powerpc/platforms/40x/ppc40x_simple.c index 5fd5a597400..546bbc229d1 100644 --- a/arch/powerpc/platforms/40x/ppc40x_simple.c +++ b/arch/powerpc/platforms/40x/ppc40x_simple.c @@ -54,7 +54,8 @@ static char *board[] __initdata = { "amcc,acadia", "amcc,haleakala", "amcc,kilauea", - "amcc,makalu" + "amcc,makalu", + "est,hotfoot" }; static int __init ppc40x_probe(void) diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig index 90e3192611a..7486bffd3eb 100644 --- a/arch/powerpc/platforms/44x/Kconfig +++ b/arch/powerpc/platforms/44x/Kconfig @@ -129,6 +129,18 @@ config REDWOOD help This option enables support for the AMCC PPC460SX Redwood board. +config EIGER + bool "Eiger" + depends on 44x + default n + select PPC44x_SIMPLE + select 460SX + select PCI + select PPC4xx_PCI_EXPRESS + select IBM_NEW_EMAC_RGMII + help + This option enables support for the AMCC PPC460SX evaluation board. + config YOSEMITE bool "Yosemite" depends on 44x diff --git a/arch/powerpc/platforms/44x/ppc44x_simple.c b/arch/powerpc/platforms/44x/ppc44x_simple.c index 5bcd441885e..e8c23ccaa1f 100644 --- a/arch/powerpc/platforms/44x/ppc44x_simple.c +++ b/arch/powerpc/platforms/44x/ppc44x_simple.c @@ -55,6 +55,7 @@ static char *board[] __initdata = { "amcc,canyonlands", "amcc,glacier", "ibm,ebony", + "amcc,eiger", "amcc,katmai", "amcc,rainier", "amcc,redwood", diff --git a/arch/powerpc/platforms/82xx/mgcoge.c b/arch/powerpc/platforms/82xx/mgcoge.c index c2af169c1d1..7a5de9eb3c7 100644 --- a/arch/powerpc/platforms/82xx/mgcoge.c +++ b/arch/powerpc/platforms/82xx/mgcoge.c @@ -50,16 +50,63 @@ struct cpm_pin { static __initdata struct cpm_pin mgcoge_pins[] = { /* SMC2 */ - {1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, - {1, 9, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, + {0, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + {0, 9, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* SCC4 */ - {3, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, - {3, 24, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, - {3, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, - {3, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, - {4, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, - {4, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, + {2, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + {2, 24, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + {2, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + {2, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + {3, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + {3, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, + + /* FCC1 */ + {0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + {0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + {0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + {0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + {0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, + {0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, + {0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, + {0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, + {0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, + {0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, + {0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, + {0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, + {0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, + {0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, + + {2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + {2, 23, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + + /* FCC2 */ + {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, + {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, + {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, + {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, + {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, + {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, + + {2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + {2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + + /* MDC */ + {0, 13, CPM_PIN_OUTPUT | CPM_PIN_GPIO}, + +#if defined(CONFIG_I2C_CPM) + /* I2C */ + {3, 14, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN}, + {3, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN}, +#endif }; static void __init init_ioports(void) @@ -68,12 +115,16 @@ static void __init init_ioports(void) for (i = 0; i < ARRAY_SIZE(mgcoge_pins); i++) { const struct cpm_pin *pin = &mgcoge_pins[i]; - cpm2_set_pin(pin->port - 1, pin->pin, pin->flags); + cpm2_set_pin(pin->port, pin->pin, pin->flags); } cpm2_smc_clk_setup(CPM_CLK_SMC2, CPM_BRG8); cpm2_clk_setup(CPM_CLK_SCC4, CPM_CLK7, CPM_CLK_RX); cpm2_clk_setup(CPM_CLK_SCC4, CPM_CLK8, CPM_CLK_TX); + cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_RX); + cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK9, CPM_CLK_TX); + cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX); + cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX); } static void __init mgcoge_setup_arch(void) diff --git a/arch/powerpc/platforms/82xx/mpc8272_ads.c b/arch/powerpc/platforms/82xx/mpc8272_ads.c index 8054c685d32..30394b409b3 100644 --- a/arch/powerpc/platforms/82xx/mpc8272_ads.c +++ b/arch/powerpc/platforms/82xx/mpc8272_ads.c @@ -29,7 +29,6 @@ #include <sysdev/fsl_soc.h> #include <sysdev/cpm2_pic.h> -#include "pq2ads.h" #include "pq2.h" static void __init mpc8272_ads_pic_init(void) @@ -100,6 +99,15 @@ static struct cpm_pin mpc8272_ads_pins[] = { /* I2C */ {3, 14, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN}, {3, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN}, + + /* USB */ + {2, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + {2, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + {2, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, + {2, 24, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, + {3, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, + {3, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, + {3, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, }; static void __init init_ioports(void) @@ -113,6 +121,8 @@ static void __init init_ioports(void) cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX); cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX); + cpm2_clk_setup(CPM_CLK_SCC3, CPM_CLK8, CPM_CLK_RX); + cpm2_clk_setup(CPM_CLK_SCC3, CPM_CLK8, CPM_CLK_TX); cpm2_clk_setup(CPM_CLK_SCC4, CPM_BRG4, CPM_CLK_RX); cpm2_clk_setup(CPM_CLK_SCC4, CPM_BRG4, CPM_CLK_TX); cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK11, CPM_CLK_RX); @@ -144,12 +154,22 @@ static void __init mpc8272_ads_setup_arch(void) return; } +#define BCSR1_FETHIEN 0x08000000 +#define BCSR1_FETH_RST 0x04000000 +#define BCSR1_RS232_EN1 0x02000000 +#define BCSR1_RS232_EN2 0x01000000 +#define BCSR3_USB_nEN 0x80000000 +#define BCSR3_FETHIEN2 0x10000000 +#define BCSR3_FETH2_RST 0x08000000 + clrbits32(&bcsr[1], BCSR1_RS232_EN1 | BCSR1_RS232_EN2 | BCSR1_FETHIEN); setbits32(&bcsr[1], BCSR1_FETH_RST); clrbits32(&bcsr[3], BCSR3_FETHIEN2); setbits32(&bcsr[3], BCSR3_FETH2_RST); + clrbits32(&bcsr[3], BCSR3_USB_nEN); + iounmap(bcsr); init_ioports(); diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig index 083ebee9a16..f49a2548c5f 100644 --- a/arch/powerpc/platforms/83xx/Kconfig +++ b/arch/powerpc/platforms/83xx/Kconfig @@ -75,11 +75,11 @@ config MPC837x_MDS This option enables support for the MPC837x MDS Processor Board. config MPC837x_RDB - bool "Freescale MPC837x RDB" + bool "Freescale MPC837x RDB/WLAN" select DEFAULT_UIMAGE select PPC_MPC837x help - This option enables support for the MPC837x RDB Board. + This option enables support for the MPC837x RDB and WLAN Boards. config SBC834x bool "Wind River SBC834x" diff --git a/arch/powerpc/platforms/83xx/mpc837x_rdb.c b/arch/powerpc/platforms/83xx/mpc837x_rdb.c index 76f3b32a155..a1908d26124 100644 --- a/arch/powerpc/platforms/83xx/mpc837x_rdb.c +++ b/arch/powerpc/platforms/83xx/mpc837x_rdb.c @@ -17,10 +17,32 @@ #include <asm/time.h> #include <asm/ipic.h> #include <asm/udbg.h> +#include <sysdev/fsl_soc.h> #include <sysdev/fsl_pci.h> #include "mpc83xx.h" +static void mpc837x_rdb_sd_cfg(void) +{ + void __iomem *im; + + im = ioremap(get_immrbase(), 0x1000); + if (!im) { + WARN_ON(1); + return; + } + + /* + * On RDB boards (in contrast to MDS) USBB pins are used for SD only, + * so we can safely mux them away from the USB block. + */ + clrsetbits_be32(im + MPC83XX_SICRL_OFFS, MPC837X_SICRL_USBB_MASK, + MPC837X_SICRL_SD); + clrsetbits_be32(im + MPC83XX_SICRH_OFFS, MPC837X_SICRH_SPI_MASK, + MPC837X_SICRH_SD); + iounmap(im); +} + /* ************************************************************************ * * Setup the architecture @@ -42,6 +64,7 @@ static void __init mpc837x_rdb_setup_arch(void) mpc83xx_add_bridge(np); #endif mpc837x_usb_cfg(); + mpc837x_rdb_sd_cfg(); } static struct of_device_id mpc837x_ids[] = { @@ -86,11 +109,12 @@ static int __init mpc837x_rdb_probe(void) return of_flat_dt_is_compatible(root, "fsl,mpc8377rdb") || of_flat_dt_is_compatible(root, "fsl,mpc8378rdb") || - of_flat_dt_is_compatible(root, "fsl,mpc8379rdb"); + of_flat_dt_is_compatible(root, "fsl,mpc8379rdb") || + of_flat_dt_is_compatible(root, "fsl,mpc8377wlan"); } define_machine(mpc837x_rdb) { - .name = "MPC837x RDB", + .name = "MPC837x RDB/WLAN", .probe = mpc837x_rdb_probe, .setup_arch = mpc837x_rdb_setup_arch, .init_IRQ = mpc837x_rdb_init_IRQ, diff --git a/arch/powerpc/platforms/83xx/mpc83xx.h b/arch/powerpc/platforms/83xx/mpc83xx.h index d1dc5b0b4fb..0fea8811d45 100644 --- a/arch/powerpc/platforms/83xx/mpc83xx.h +++ b/arch/powerpc/platforms/83xx/mpc83xx.h @@ -30,6 +30,8 @@ #define MPC8315_SICRL_USB_ULPI 0x00000054 #define MPC837X_SICRL_USB_MASK 0xf0000000 #define MPC837X_SICRL_USB_ULPI 0x50000000 +#define MPC837X_SICRL_USBB_MASK 0x30000000 +#define MPC837X_SICRL_SD 0x20000000 /* system i/o configuration register high */ #define MPC83XX_SICRH_OFFS 0x118 @@ -38,6 +40,8 @@ #define MPC831X_SICRH_USB_ULPI 0x000000a0 #define MPC8315_SICRH_USB_MASK 0x0000ff00 #define MPC8315_SICRH_USB_ULPI 0x00000000 +#define MPC837X_SICRH_SPI_MASK 0x00000003 +#define MPC837X_SICRH_SD 0x00000001 /* USB Control Register */ #define FSL_USB2_CONTROL_OFFS 0x500 diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig index a9b41668897..d3a975e8fd3 100644 --- a/arch/powerpc/platforms/85xx/Kconfig +++ b/arch/powerpc/platforms/85xx/Kconfig @@ -55,6 +55,15 @@ config MPC85xx_DS help This option enables support for the MPC85xx DS (MPC8544 DS) board +config MPC85xx_RDB + bool "Freescale MPC85xx RDB" + select PPC_I8259 + select DEFAULT_UIMAGE + select FSL_ULI1575 + select SWIOTLB + help + This option enables support for the MPC85xx RDB (P2020 RDB) board + config SOCRATES bool "Socrates" select DEFAULT_UIMAGE diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile index 835733f2b12..9098aea0cf3 100644 --- a/arch/powerpc/platforms/85xx/Makefile +++ b/arch/powerpc/platforms/85xx/Makefile @@ -9,10 +9,11 @@ obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o obj-$(CONFIG_MPC8536_DS) += mpc8536_ds.o obj-$(CONFIG_MPC85xx_DS) += mpc85xx_ds.o obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o +obj-$(CONFIG_MPC85xx_RDB) += mpc85xx_rdb.o obj-$(CONFIG_STX_GP3) += stx_gp3.o obj-$(CONFIG_TQM85xx) += tqm85xx.o obj-$(CONFIG_SBC8560) += sbc8560.o obj-$(CONFIG_SBC8548) += sbc8548.o obj-$(CONFIG_SOCRATES) += socrates.o socrates_fpga_pic.o obj-$(CONFIG_KSI8560) += ksi8560.o -obj-$(CONFIG_XES_MPC85xx) += xes_mpc85xx.o
\ No newline at end of file +obj-$(CONFIG_XES_MPC85xx) += xes_mpc85xx.o diff --git a/arch/powerpc/platforms/85xx/mpc8536_ds.c b/arch/powerpc/platforms/85xx/mpc8536_ds.c index 055ff417bae..004b7d36cdb 100644 --- a/arch/powerpc/platforms/85xx/mpc8536_ds.c +++ b/arch/powerpc/platforms/85xx/mpc8536_ds.c @@ -96,7 +96,8 @@ static void __init mpc8536_ds_setup_arch(void) #ifdef CONFIG_SWIOTLB if (lmb_end_of_DRAM() > max) { ppc_swiotlb_enable = 1; - set_pci_dma_ops(&swiotlb_pci_dma_ops); + set_pci_dma_ops(&swiotlb_dma_ops); + ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb; } #endif diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c index 849c0ac0025..544011a562f 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c @@ -192,7 +192,8 @@ static void __init mpc85xx_ds_setup_arch(void) #ifdef CONFIG_SWIOTLB if (lmb_end_of_DRAM() > max) { ppc_swiotlb_enable = 1; - set_pci_dma_ops(&swiotlb_pci_dma_ops); + set_pci_dma_ops(&swiotlb_dma_ops); + ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb; } #endif diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c index bfb32834ab0..3909d57b86e 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c @@ -47,6 +47,7 @@ #include <asm/udbg.h> #include <sysdev/fsl_soc.h> #include <sysdev/fsl_pci.h> +#include <sysdev/simple_gpio.h> #include <asm/qe.h> #include <asm/qe_ic.h> #include <asm/mpic.h> @@ -254,7 +255,8 @@ static void __init mpc85xx_mds_setup_arch(void) #ifdef CONFIG_SWIOTLB if (lmb_end_of_DRAM() > max) { ppc_swiotlb_enable = 1; - set_pci_dma_ops(&swiotlb_pci_dma_ops); + set_pci_dma_ops(&swiotlb_dma_ops); + ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb; } #endif } @@ -304,6 +306,9 @@ static struct of_device_id mpc85xx_ids[] = { static int __init mpc85xx_publish_devices(void) { + if (machine_is(mpc8569_mds)) + simple_gpiochip_init("fsl,mpc8569mds-bcsr-gpio"); + /* Publish the QE devices */ of_platform_bus_probe(NULL, mpc85xx_ids, NULL); diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c new file mode 100644 index 00000000000..c8468de4acf --- /dev/null +++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c @@ -0,0 +1,141 @@ +/* + * MPC85xx RDB Board Setup + * + * Copyright 2009 Freescale Semiconductor Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include <linux/stddef.h> +#include <linux/kernel.h> +#include <linux/pci.h> +#include <linux/kdev_t.h> +#include <linux/delay.h> +#include <linux/seq_file.h> +#include <linux/interrupt.h> +#include <linux/of_platform.h> + +#include <asm/system.h> +#include <asm/time.h> +#include <asm/machdep.h> +#include <asm/pci-bridge.h> +#include <mm/mmu_decl.h> +#include <asm/prom.h> +#include <asm/udbg.h> +#include <asm/mpic.h> + +#include <sysdev/fsl_soc.h> +#include <sysdev/fsl_pci.h> + +#undef DEBUG + +#ifdef DEBUG +#define DBG(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args) +#else +#define DBG(fmt, args...) +#endif + + +void __init mpc85xx_rdb_pic_init(void) +{ + struct mpic *mpic; + struct resource r; + struct device_node *np; + + np = of_find_node_by_type(NULL, "open-pic"); + if (np == NULL) { + printk(KERN_ERR "Could not find open-pic node\n"); + return; + } + + if (of_address_to_resource(np, 0, &r)) { + printk(KERN_ERR "Failed to map mpic register space\n"); + of_node_put(np); + return; + } + + mpic = mpic_alloc(np, r.start, + MPIC_PRIMARY | MPIC_WANTS_RESET | + MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS | + MPIC_SINGLE_DEST_CPU, + 0, 256, " OpenPIC "); + + BUG_ON(mpic == NULL); + of_node_put(np); + + mpic_init(mpic); + +} + +/* + * Setup the architecture + */ +#ifdef CONFIG_SMP +extern void __init mpc85xx_smp_init(void); +#endif +static void __init mpc85xx_rdb_setup_arch(void) +{ +#ifdef CONFIG_PCI + struct device_node *np; +#endif + + if (ppc_md.progress) + ppc_md.progress("mpc85xx_rdb_setup_arch()", 0); + +#ifdef CONFIG_PCI + for_each_node_by_type(np, "pci") { + if (of_device_is_compatible(np, "fsl,mpc8548-pcie")) + fsl_add_bridge(np, 0); + } + +#endif + +#ifdef CONFIG_SMP + mpc85xx_smp_init(); +#endif + + printk(KERN_INFO "MPC85xx RDB board from Freescale Semiconductor\n"); +} + +static struct of_device_id __initdata mpc85xxrdb_ids[] = { + { .type = "soc", }, + { .compatible = "soc", }, + { .compatible = "simple-bus", }, + { .compatible = "gianfar", }, + {}, +}; + +static int __init mpc85xxrdb_publish_devices(void) +{ + return of_platform_bus_probe(NULL, mpc85xxrdb_ids, NULL); +} +machine_device_initcall(p2020_rdb, mpc85xxrdb_publish_devices); + +/* + * Called very early, device-tree isn't unflattened + */ +static int __init p2020_rdb_probe(void) +{ + unsigned long root = of_get_flat_dt_root(); + + if (of_flat_dt_is_compatible(root, "fsl,P2020RDB")) + return 1; + return 0; +} + +define_machine(p2020_rdb) { + .name = "P2020 RDB", + .probe = p2020_rdb_probe, + .setup_arch = mpc85xx_rdb_setup_arch, + .init_IRQ = mpc85xx_rdb_pic_init, +#ifdef CONFIG_PCI + .pcibios_fixup_bus = fsl_pcibios_fixup_bus, +#endif + .get_irq = mpic_get_irq, + .restart = fsl_rstcr_restart, + .calibrate_decr = generic_calibrate_decr, + .progress = udbg_progress, +}; diff --git a/arch/powerpc/platforms/85xx/sbc8560.c b/arch/powerpc/platforms/85xx/sbc8560.c index cc27807a8b6..a5ad1c7794b 100644 --- a/arch/powerpc/platforms/85xx/sbc8560.c +++ b/arch/powerpc/platforms/85xx/sbc8560.c @@ -267,6 +267,43 @@ arch_initcall(sbc8560_rtc_init); #endif /* M48T59 */ +static __u8 __iomem *brstcr; + +static int __init sbc8560_bdrstcr_init(void) +{ + struct device_node *np; + struct resource res; + + np = of_find_compatible_node(NULL, NULL, "wrs,sbc8560-brstcr"); + if (np == NULL) { + printk(KERN_WARNING "sbc8560: No board specific RSTCR in DTB.\n"); + return -ENODEV; + } + + of_address_to_resource(np, 0, &res); + + printk(KERN_INFO "sbc8560: Found BRSTCR at i/o 0x%x\n", res.start); + + brstcr = ioremap(res.start, res.end - res.start); + if(!brstcr) + printk(KERN_WARNING "sbc8560: ioremap of brstcr failed.\n"); + + of_node_put(np); + + return 0; +} + +arch_initcall(sbc8560_bdrstcr_init); + +void sbc8560_rstcr_restart(char * cmd) +{ + local_irq_disable(); + if(brstcr) + clrbits8(brstcr, 0x80); + + while(1); +} + define_machine(sbc8560) { .name = "SBC8560", .probe = sbc8560_probe, @@ -274,7 +311,7 @@ define_machine(sbc8560) { .init_IRQ = sbc8560_pic_init, .show_cpuinfo = sbc8560_show_cpuinfo, .get_irq = mpic_get_irq, - .restart = fsl_rstcr_restart, + .restart = sbc8560_rstcr_restart, .calibrate_decr = generic_calibrate_decr, .progress = udbg_progress, }; |