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author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2012-09-17 16:07:43 +1000 |
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committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2012-09-17 16:07:43 +1000 |
commit | eda485f06d17f98bd58559fb5dd331951ffd1608 (patch) | |
tree | c76f119e68734932c6751cd14fdd420544da92c3 /arch/powerpc/kernel | |
parent | 6b5e7229bbd59f0cfce7015fd46736fc93d8c8c3 (diff) | |
parent | 9a5d5bd8480068c5829e3d997ee21dab9b3ed05f (diff) |
Merge remote-tracking branch 'pci/pci/gavin-window-alignment' into next
Merge Gavin patches from the PCI tree as subsequent powerpc
patches are going to depend on them
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel')
-rw-r--r-- | arch/powerpc/kernel/pci-common.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c index 4cb714792be..7f94f760dd0 100644 --- a/arch/powerpc/kernel/pci-common.c +++ b/arch/powerpc/kernel/pci-common.c @@ -99,6 +99,26 @@ void pcibios_free_controller(struct pci_controller *phb) kfree(phb); } +/* + * The function is used to return the minimal alignment + * for memory or I/O windows of the associated P2P bridge. + * By default, 4KiB alignment for I/O windows and 1MiB for + * memory windows. + */ +resource_size_t pcibios_window_alignment(struct pci_bus *bus, + unsigned long type) +{ + if (ppc_md.pcibios_window_alignment) + return ppc_md.pcibios_window_alignment(bus, type); + + /* + * PCI core will figure out the default + * alignment: 4KiB for I/O and 1MiB for + * memory window. + */ + return 1; +} + static resource_size_t pcibios_io_size(const struct pci_controller *hose) { #ifdef CONFIG_PPC64 |