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authorPeter Zijlstra <a.p.zijlstra@chello.nl>2009-06-11 14:19:11 +0200
committerIngo Molnar <mingo@elte.hu>2009-06-11 17:54:17 +0200
commit8be6e8f3c3a13900169f1141870562d0c723b010 (patch)
tree0041b2557561ada3566bd309f0b3153e31a9854c /arch/powerpc/kernel/power5-pmu.c
parentf4dbfa8f3131a84257223393905f7efad0ca5996 (diff)
perf_counter: Rename L2 to LL cache
The top (fastest) and last level (biggest) caches are the most interesting ones, performance wise. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Mike Galbraith <efault@gmx.de> Cc: Paul Mackerras <paulus@samba.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> LKML-Reference: <new-submission> [ Fixed the Nehalem LL table to LLC Reference/Miss events ] Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/powerpc/kernel/power5-pmu.c')
-rw-r--r--arch/powerpc/kernel/power5-pmu.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/kernel/power5-pmu.c b/arch/powerpc/kernel/power5-pmu.c
index d54723ab627..05600b66221 100644
--- a/arch/powerpc/kernel/power5-pmu.c
+++ b/arch/powerpc/kernel/power5-pmu.c
@@ -574,7 +574,7 @@ static int power5_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
[C(OP_WRITE)] = { -1, -1 },
[C(OP_PREFETCH)] = { 0, 0 },
},
- [C(L2)] = { /* RESULT_ACCESS RESULT_MISS */
+ [C(LL)] = { /* RESULT_ACCESS RESULT_MISS */
[C(OP_READ)] = { 0, 0x3c309b },
[C(OP_WRITE)] = { 0, 0 },
[C(OP_PREFETCH)] = { 0xc50c3, 0 },