diff options
| author | Kyle Moffett <Kyle.D.Moffett@boeing.com> | 2011-12-22 10:19:11 +0000 |
|---|---|---|
| committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2012-02-23 10:49:59 +1100 |
| commit | 9ca163c8602681ad098910f48f89b97f0cb87c4f (patch) | |
| tree | e2aa87c28be3b1253273b1a1e609b5d0e9d6feb7 /arch/powerpc/boot | |
| parent | 98cca250aecaf3f1b2fec003e1c0ce0bfaa4be36 (diff) | |
fsl/mpic: Create and document the "single-cpu-affinity" device-tree flag
The Freescale MPIC (and perhaps others in the future) is incapable of
routing non-IPI interrupts to more than once CPU at a time. Currently
all of the Freescale boards msut pass the MPIC_SINGLE_DEST_CPU flag to
mpic_alloc(), but that information should really be present in the
device-tree.
Older board code can't rely on the device-tree having the property set,
but newer platforms won't need it manually specified in the code.
[BenH: Remove unrelated changes, folded in a different patch]
Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot')
| -rw-r--r-- | arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi b/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi index 47f2b676bc7..658bd81982c 100644 --- a/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi +++ b/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi @@ -40,6 +40,7 @@ mpic: pic@40000 { compatible = "fsl,mpic"; device_type = "open-pic"; big-endian; + single-cpu-affinity; }; timer@41100 { |