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authorJames Morris <jmorris@namei.org>2010-05-06 10:56:07 +1000
committerJames Morris <jmorris@namei.org>2010-05-06 10:56:07 +1000
commit0ffbe2699cda6afbe08501098dff8a8c2fe6ae09 (patch)
tree81b1a2305d16c873371b65c5a863c0268036cefe /arch/mips
parent4e5d6f7ec3833c0da9cf34fa5c53c6058c5908b6 (diff)
parent7ebd467551ed6ae200d7835a84bbda0dcadaa511 (diff)
Merge branch 'master' into next
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/Kconfig31
-rw-r--r--arch/mips/Makefile13
-rw-r--r--arch/mips/alchemy/devboards/db1200/setup.c50
-rw-r--r--arch/mips/ar7/platform.c3
-rw-r--r--arch/mips/bcm63xx/boards/board_bcm963xx.c231
-rw-r--r--arch/mips/bcm63xx/cpu.c5
-rw-r--r--arch/mips/bcm63xx/dev-uart.c66
-rw-r--r--arch/mips/bcm63xx/gpio.c4
-rw-r--r--arch/mips/cavium-octeon/setup.c82
-rw-r--r--arch/mips/cavium-octeon/smp.c8
-rw-r--r--arch/mips/configs/bcm63xx_defconfig418
-rw-r--r--arch/mips/configs/bigsur_defconfig680
-rw-r--r--arch/mips/include/asm/abi.h6
-rw-r--r--arch/mips/include/asm/cmpxchg.h2
-rw-r--r--arch/mips/include/asm/elf.h5
-rw-r--r--arch/mips/include/asm/fpu_emulator.h6
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h15
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_uart.h6
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h4
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h2
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h2
-rw-r--r--arch/mips/include/asm/mach-loongson/loongson.h2
-rw-r--r--arch/mips/include/asm/mach-sibyte/war.h6
-rw-r--r--arch/mips/include/asm/mmu.h5
-rw-r--r--arch/mips/include/asm/mmu_context.h2
-rw-r--r--arch/mips/include/asm/page.h6
-rw-r--r--arch/mips/include/asm/pgtable-64.h9
-rw-r--r--arch/mips/include/asm/processor.h11
-rw-r--r--arch/mips/include/asm/ptrace.h4
-rw-r--r--arch/mips/include/asm/stackframe.h19
-rw-r--r--arch/mips/include/asm/uasm.h20
-rw-r--r--arch/mips/include/asm/vdso.h29
-rw-r--r--arch/mips/jazz/jazzdma.c1
-rw-r--r--arch/mips/jazz/setup.c12
-rw-r--r--arch/mips/kernel/Makefile2
-rw-r--r--arch/mips/kernel/cpufreq/loongson2_clock.c4
-rw-r--r--arch/mips/kernel/irq.c1
-rw-r--r--arch/mips/kernel/linux32.c2
-rw-r--r--arch/mips/kernel/process.c8
-rw-r--r--arch/mips/kernel/rtlx.c1
-rw-r--r--arch/mips/kernel/signal-common.h5
-rw-r--r--arch/mips/kernel/signal.c86
-rw-r--r--arch/mips/kernel/signal32.c55
-rw-r--r--arch/mips/kernel/signal_n32.c26
-rw-r--r--arch/mips/kernel/smtc.c3
-rw-r--r--arch/mips/kernel/syscall.c8
-rw-r--r--arch/mips/kernel/traps.c18
-rw-r--r--arch/mips/kernel/vdso.c112
-rw-r--r--arch/mips/lib/delay.c4
-rw-r--r--arch/mips/lib/libgcc.h3
-rw-r--r--arch/mips/loongson/common/machtype.c2
-rw-r--r--arch/mips/loongson/common/mem.c4
-rw-r--r--arch/mips/loongson/common/reset.c20
-rw-r--r--arch/mips/loongson/common/setup.c15
-rw-r--r--arch/mips/loongson/lemote-2f/irq.c2
-rw-r--r--arch/mips/mipssim/sim_int.c1
-rw-r--r--arch/mips/mm/cache.c2
-rw-r--r--arch/mips/mm/dma-default.c1
-rw-r--r--arch/mips/mm/hugetlbpage.c1
-rw-r--r--arch/mips/mm/init.c1
-rw-r--r--arch/mips/mm/ioremap.c1
-rw-r--r--arch/mips/mm/tlbex.c150
-rw-r--r--arch/mips/mm/uasm.c23
-rw-r--r--arch/mips/mti-malta/malta-int.c1
-rw-r--r--arch/mips/nxp/pnx833x/common/reset.c1
-rw-r--r--arch/mips/nxp/pnx8550/common/int.c1
-rw-r--r--arch/mips/nxp/pnx8550/common/proc.c1
-rw-r--r--arch/mips/nxp/pnx8550/common/reset.c3
-rw-r--r--arch/mips/pci/ops-loongson2.c10
-rw-r--r--arch/mips/pci/ops-titan-ht.c1
-rw-r--r--arch/mips/pci/pci-sb1250.c3
-rw-r--r--arch/mips/pmc-sierra/msp71xx/msp_prom.c1
-rw-r--r--arch/mips/pmc-sierra/yosemite/ht.c1
-rw-r--r--arch/mips/pmc-sierra/yosemite/irq.c1
-rw-r--r--arch/mips/powertv/asic/asic_devices.c1
-rw-r--r--arch/mips/powertv/asic/asic_int.c1
-rw-r--r--arch/mips/rb532/irq.c1
-rw-r--r--arch/mips/sgi-ip22/ip22-berr.c2
-rw-r--r--arch/mips/sgi-ip22/ip28-berr.c2
-rw-r--r--arch/mips/sgi-ip27/ip27-irq.c1
-rw-r--r--arch/mips/sgi-ip32/ip32-irq.c1
-rw-r--r--arch/mips/sibyte/bcm1480/irq.c1
-rw-r--r--arch/mips/sibyte/common/sb_tbprof.c1
-rw-r--r--arch/mips/sibyte/sb1250/irq.c1
-rw-r--r--arch/mips/sibyte/sb1250/setup.c15
-rw-r--r--arch/mips/sibyte/swarm/setup.c17
-rw-r--r--arch/mips/txx9/generic/pci.c1
-rw-r--r--arch/mips/txx9/generic/setup.c1
-rw-r--r--arch/mips/txx9/generic/spi_eeprom.c1
-rw-r--r--arch/mips/txx9/rbtx4939/setup.c1
90 files changed, 1622 insertions, 776 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 29e86923d1b..7e6fd1cbd3f 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -49,7 +49,7 @@ config AR7
family: TNETD7100, 7200 and 7300.
config BCM47XX
- bool "BCM47XX based boards"
+ bool "Broadcom BCM47XX based boards"
select CEVT_R4K
select CSRC_R4K
select DMA_NONCOHERENT
@@ -509,6 +509,7 @@ config SIBYTE_SWARM
bool "Sibyte BCM91250A-SWARM"
select BOOT_ELF32
select DMA_COHERENT
+ select HAVE_PATA_PLATFORM
select NR_CPUS_DEFAULT_2
select SIBYTE_SB1250
select SWAP_IO_SPACE
@@ -523,6 +524,7 @@ config SIBYTE_LITTLESUR
depends on EXPERIMENTAL
select BOOT_ELF32
select DMA_COHERENT
+ select HAVE_PATA_PLATFORM
select NR_CPUS_DEFAULT_2
select SIBYTE_SB1250
select SWAP_IO_SPACE
@@ -1305,6 +1307,33 @@ config CPU_CAVIUM_OCTEON
endchoice
+if CPU_LOONGSON2F
+config CPU_NOP_WORKAROUNDS
+ bool
+
+config CPU_JUMP_WORKAROUNDS
+ bool
+
+config CPU_LOONGSON2F_WORKAROUNDS
+ bool "Loongson 2F Workarounds"
+ default y
+ select CPU_NOP_WORKAROUNDS
+ select CPU_JUMP_WORKAROUNDS
+ help
+ Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
+ require workarounds. Without workarounds the system may hang
+ unexpectedly. For more information please refer to the gas
+ -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
+
+ Loongson 2F03 and later have fixed these issues and no workarounds
+ are needed. The workarounds have no significant side effect on them
+ but may decrease the performance of the system so this option should
+ be disabled unless the kernel is intended to be run on 2F01 or 2F02
+ systems.
+
+ If unsure, please say Y.
+endif # CPU_LOONGSON2F
+
config SYS_SUPPORTS_ZBOOT
bool
select HAVE_KERNEL_GZIP
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 2f2eac23332..0b9c01add0a 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -136,6 +136,19 @@ cflags-$(CONFIG_CPU_LOONGSON2E) += \
$(call cc-option,-march=loongson2e,-march=r4600)
cflags-$(CONFIG_CPU_LOONGSON2F) += \
$(call cc-option,-march=loongson2f,-march=r4600)
+# enable the workarounds for loongson2f
+ifdef CONFIG_CPU_LOONGSON2F_WORKAROUNDS
+ ifeq ($(call as-option,-Wa$(comma)-mfix-loongson2f-nop,),)
+ $(error only binutils >= 2.20.2 have needed option -mfix-loongson2f-nop)
+ else
+ cflags-$(CONFIG_CPU_NOP_WORKAROUNDS) += -Wa$(comma)-mfix-loongson2f-nop
+ endif
+ ifeq ($(call as-option,-Wa$(comma)-mfix-loongson2f-jump,),)
+ $(error only binutils >= 2.20.2 have needed option -mfix-loongson2f-jump)
+ else
+ cflags-$(CONFIG_CPU_JUMP_WORKAROUNDS) += -Wa$(comma)-mfix-loongson2f-jump
+ endif
+endif
cflags-$(CONFIG_CPU_MIPS32_R1) += $(call cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
-Wa,-mips32 -Wa,--trap
diff --git a/arch/mips/alchemy/devboards/db1200/setup.c b/arch/mips/alchemy/devboards/db1200/setup.c
index 379536e3abd..88761954755 100644
--- a/arch/mips/alchemy/devboards/db1200/setup.c
+++ b/arch/mips/alchemy/devboards/db1200/setup.c
@@ -60,58 +60,22 @@ void __init board_setup(void)
wmb();
}
-/* use the hexleds to count the number of times the cpu has entered
- * wait, the dots to indicate whether the CPU is currently idle or
- * active (dots off = sleeping, dots on = working) for cases where
- * the number doesn't change for a long(er) period of time.
- */
-static void db1200_wait(void)
-{
- __asm__(" .set push \n"
- " .set mips3 \n"
- " .set noreorder \n"
- " cache 0x14, 0(%0) \n"
- " cache 0x14, 32(%0) \n"
- " cache 0x14, 64(%0) \n"
- /* dots off: we're about to call wait */
- " lui $26, 0xb980 \n"
- " ori $27, $0, 3 \n"
- " sb $27, 0x18($26) \n"
- " sync \n"
- " nop \n"
- " wait \n"
- " nop \n"
- " nop \n"
- " nop \n"
- " nop \n"
- " nop \n"
- /* dots on: there's work to do, increment cntr */
- " lui $26, 0xb980 \n"
- " sb $0, 0x18($26) \n"
- " lui $26, 0xb9c0 \n"
- " lb $27, 0($26) \n"
- " addiu $27, $27, 1 \n"
- " sb $27, 0($26) \n"
- " sync \n"
- " .set pop \n"
- : : "r" (db1200_wait));
-}
-
static int __init db1200_arch_init(void)
{
/* GPIO7 is low-level triggered CPLD cascade */
set_irq_type(AU1200_GPIO7_INT, IRQF_TRIGGER_LOW);
bcsr_init_irq(DB1200_INT_BEGIN, DB1200_INT_END, AU1200_GPIO7_INT);
- /* do not autoenable these: CPLD has broken edge int handling,
- * and the CD handler setup requires manual enabling to work
- * around that.
+ /* insert/eject pairs: one of both is always screaming. To avoid
+ * issues they must not be automatically enabled when initially
+ * requested.
*/
irq_to_desc(DB1200_SD0_INSERT_INT)->status |= IRQ_NOAUTOEN;
irq_to_desc(DB1200_SD0_EJECT_INT)->status |= IRQ_NOAUTOEN;
-
- if (cpu_wait)
- cpu_wait = db1200_wait;
+ irq_to_desc(DB1200_PC0_INSERT_INT)->status |= IRQ_NOAUTOEN;
+ irq_to_desc(DB1200_PC0_EJECT_INT)->status |= IRQ_NOAUTOEN;
+ irq_to_desc(DB1200_PC1_INSERT_INT)->status |= IRQ_NOAUTOEN;
+ irq_to_desc(DB1200_PC1_EJECT_INT)->status |= IRQ_NOAUTOEN;
return 0;
}
diff --git a/arch/mips/ar7/platform.c b/arch/mips/ar7/platform.c
index 246df7aca2e..2fafc78e5ce 100644
--- a/arch/mips/ar7/platform.c
+++ b/arch/mips/ar7/platform.c
@@ -168,7 +168,7 @@ static struct plat_vlynq_data vlynq_high_data = {
.on = vlynq_on,
.off = vlynq_off,
},
- .reset_bit = 26,
+ .reset_bit = 16,
.gpio_bit = 19,
};
@@ -600,6 +600,7 @@ static int __init ar7_register_devices(void)
}
if (ar7_has_high_cpmac()) {
+ res = fixed_phy_add(PHY_POLL, cpmac_high.id, &fixed_phy_status);
if (!res) {
cpmac_get_mac(1, cpmac_high_data.dev_addr);
diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c b/arch/mips/bcm63xx/boards/board_bcm963xx.c
index ea17941168c..8dba8cfb752 100644
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -18,6 +18,7 @@
#include <asm/addrspace.h>
#include <bcm63xx_board.h>
#include <bcm63xx_cpu.h>
+#include <bcm63xx_dev_uart.h>
#include <bcm63xx_regs.h>
#include <bcm63xx_io.h>
#include <bcm63xx_dev_pci.h>
@@ -40,6 +41,7 @@ static struct board_info __initdata board_96338gw = {
.name = "96338GW",
.expected_cpu_id = 0x6338,
+ .has_uart0 = 1,
.has_enet0 = 1,
.enet0 = {
.force_speed_100 = 1,
@@ -82,6 +84,7 @@ static struct board_info __initdata board_96338w = {
.name = "96338W",
.expected_cpu_id = 0x6338,
+ .has_uart0 = 1,
.has_enet0 = 1,
.enet0 = {
.force_speed_100 = 1,
@@ -126,6 +129,8 @@ static struct board_info __initdata board_96338w = {
static struct board_info __initdata board_96345gw2 = {
.name = "96345GW2",
.expected_cpu_id = 0x6345,
+
+ .has_uart0 = 1,
};
#endif
@@ -137,6 +142,7 @@ static struct board_info __initdata board_96348r = {
.name = "96348R",
.expected_cpu_id = 0x6348,
+ .has_uart0 = 1,
.has_enet0 = 1,
.has_pci = 1,
@@ -180,6 +186,7 @@ static struct board_info __initdata board_96348gw_10 = {
.name = "96348GW-10",
.expected_cpu_id = 0x6348,
+ .has_uart0 = 1,
.has_enet0 = 1,
.has_enet1 = 1,
.has_pci = 1,
@@ -239,6 +246,7 @@ static struct board_info __initdata board_96348gw_11 = {
.name = "96348GW-11",
.expected_cpu_id = 0x6348,
+ .has_uart0 = 1,
.has_enet0 = 1,
.has_enet1 = 1,
.has_pci = 1,
@@ -292,6 +300,7 @@ static struct board_info __initdata board_96348gw = {
.name = "96348GW",
.expected_cpu_id = 0x6348,
+ .has_uart0 = 1,
.has_enet0 = 1,
.has_enet1 = 1,
.has_pci = 1,
@@ -349,9 +358,10 @@ static struct board_info __initdata board_FAST2404 = {
.name = "F@ST2404",
.expected_cpu_id = 0x6348,
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
+ .has_uart0 = 1,
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
.enet0 = {
.has_phy = 1,
@@ -368,10 +378,30 @@ static struct board_info __initdata board_FAST2404 = {
.has_ehci0 = 1,
};
+static struct board_info __initdata board_rta1025w_16 = {
+ .name = "RTA1025W_16",
+ .expected_cpu_id = 0x6348,
+
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
+
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+ .enet1 = {
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
+
static struct board_info __initdata board_DV201AMR = {
.name = "DV201AMR",
.expected_cpu_id = 0x6348,
+ .has_uart0 = 1,
.has_pci = 1,
.has_ohci0 = 1,
@@ -391,6 +421,7 @@ static struct board_info __initdata board_96348gw_a = {
.name = "96348GW-A",
.expected_cpu_id = 0x6348,
+ .has_uart0 = 1,
.has_enet0 = 1,
.has_enet1 = 1,
.has_pci = 1,
@@ -416,6 +447,7 @@ static struct board_info __initdata board_96358vw = {
.name = "96358VW",
.expected_cpu_id = 0x6358,
+ .has_uart0 = 1,
.has_enet0 = 1,
.has_enet1 = 1,
.has_pci = 1,
@@ -467,6 +499,7 @@ static struct board_info __initdata board_96358vw2 = {
.name = "96358VW2",
.expected_cpu_id = 0x6358,
+ .has_uart0 = 1,
.has_enet0 = 1,
.has_enet1 = 1,
.has_pci = 1,
@@ -514,6 +547,7 @@ static struct board_info __initdata board_AGPFS0 = {
.name = "AGPF-S0",
.expected_cpu_id = 0x6358,
+ .has_uart0 = 1,
.has_enet0 = 1,
.has_enet1 = 1,
.has_pci = 1,
@@ -531,6 +565,27 @@ static struct board_info __initdata board_AGPFS0 = {
.has_ohci0 = 1,
.has_ehci0 = 1,
};
+
+static struct board_info __initdata board_DWVS0 = {
+ .name = "DWV-S0",
+ .expected_cpu_id = 0x6358,
+
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
+
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+
+ .enet1 = {
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+
+ .has_ohci0 = 1,
+};
#endif
/*
@@ -552,16 +607,88 @@ static const struct board_info __initdata *bcm963xx_boards[] = {
&board_FAST2404,
&board_DV201AMR,
&board_96348gw_a,
+ &board_rta1025w_16,
#endif
#ifdef CONFIG_BCM63XX_CPU_6358
&board_96358vw,
&board_96358vw2,
&board_AGPFS0,
+ &board_DWVS0,
#endif
};
/*
+ * Register a sane SPROMv2 to make the on-board
+ * bcm4318 WLAN work
+ */
+#ifdef CONFIG_SSB_PCIHOST
+static struct ssb_sprom bcm63xx_sprom = {
+ .revision = 0x02,
+ .board_rev = 0x17,
+ .country_code = 0x0,
+ .ant_available_bg = 0x3,
+ .pa0b0 = 0x15ae,
+ .pa0b1 = 0xfa85,
+ .pa0b2 = 0xfe8d,
+ .pa1b0 = 0xffff,
+ .pa1b1 = 0xffff,
+ .pa1b2 = 0xffff,
+ .gpio0 = 0xff,
+ .gpio1 = 0xff,
+ .gpio2 = 0xff,
+ .gpio3 = 0xff,
+ .maxpwr_bg = 0x004c,
+ .itssi_bg = 0x00,
+ .boardflags_lo = 0x2848,
+ .boardflags_hi = 0x0000,
+};
+#endif</