diff options
| author | Wu Zhangjin <wuzhangjin@gmail.com> | 2010-03-13 12:34:15 +0800 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2010-04-12 17:26:15 +0100 |
| commit | f1df323924e2fde14cbcd51209a8cbfc33e0c232 (patch) | |
| tree | a0f5a3c09e4a9e8ec3eb11bcc4e9d729b0af9dce /arch/mips | |
| parent | d814c28ceca8f659c0012eaec8e21eee43710716 (diff) | |
MIPS: Loongson-2F: Flush the branch target history in BTB and RAS
As per chapter 15 "Errata: Issue of Out-of-order in loongson"[1] to work
around the Loongson 2F erratum we need to do:
"When switching from user mode to kernel mode, you should flush the
branch target history such as BTB and RAS."
[1] Chinese version: http://www.loongson.cn/uploadfile/file/200808211
[2] English version of chapter 15:
http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=source
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Patchwork: http://patchwork.linux-mips.org/patch/1066/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/include/asm/stackframe.h | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h index 3b6da3330e3..c8419129e77 100644 --- a/arch/mips/include/asm/stackframe.h +++ b/arch/mips/include/asm/stackframe.h @@ -121,6 +121,25 @@ .endm #else .macro get_saved_sp /* Uniprocessor variation */ +#ifdef CONFIG_CPU_LOONGSON2F + /* + * Clear BTB (branch target buffer), forbid RAS (return address + * stack) to workaround the Out-of-order Issue in Loongson2F + * via its diagnostic register. + */ + move k0, ra + jal 1f + nop +1: jal 1f + nop +1: jal 1f + nop +1: jal 1f + nop +1: move ra, k0 + li k0, 3 + mtc0 k0, $22 +#endif /* CONFIG_CPU_LOONGSON2F */ #if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32) lui k1, %hi(kernelsp) #else |