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| author | Gilles Espinasse <g.esp@free.fr> | 2010-03-29 15:41:47 +0200 |
|---|---|---|
| committer | Jiri Kosina <jkosina@suse.cz> | 2010-03-29 15:41:47 +0200 |
| commit | f77f13e22df4a40d237697df496152c8c37f3f2b (patch) | |
| tree | beccbb0214078d68027f7a17b57be556292475bd /arch/mips/sibyte/sb1250/irq.c | |
| parent | 5239c4ff4ae9e810ba761518ad71b463f0ccbf3c (diff) | |
Fix comment and Kconfig typos for 'require' and 'fragment'
Signed-off-by: Gilles Espinasse <g.esp@free.fr>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Diffstat (limited to 'arch/mips/sibyte/sb1250/irq.c')
| -rw-r--r-- | arch/mips/sibyte/sb1250/irq.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c index ab44a2f59ee..b452e3c8279 100644 --- a/arch/mips/sibyte/sb1250/irq.c +++ b/arch/mips/sibyte/sb1250/irq.c @@ -237,7 +237,7 @@ void __init init_sb1250_irqs(void) * On the second cpu, everything is set to IP5, which is * ignored, EXCEPT the mailbox interrupt. That one is * set to IP[2] so it is handled. This is needed so we - * can do cross-cpu function calls, as requred by SMP + * can do cross-cpu function calls, as required by SMP */ #define IMR_IP2_VAL K_INT_MAP_I0 |