diff options
| author | Ingo Molnar <mingo@elte.hu> | 2009-03-30 23:53:32 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2009-03-30 23:53:32 +0200 |
| commit | 65fb0d23fcddd8697c871047b700c78817bdaa43 (patch) | |
| tree | 119e6e5f276622c4c862f6c9b6d795264ba1603a /arch/mips/sgi-ip32/ip32-irq.c | |
| parent | 8c083f081d0014057901c68a0a3e0f8ca7ac8d23 (diff) | |
| parent | dfbbe89e197a77f2c8046a51c74e33e35f878080 (diff) | |
Merge branch 'linus' into cpumask-for-linus
Conflicts:
arch/x86/kernel/cpu/common.c
Diffstat (limited to 'arch/mips/sgi-ip32/ip32-irq.c')
| -rw-r--r-- | arch/mips/sgi-ip32/ip32-irq.c | 63 |
1 files changed, 45 insertions, 18 deletions
diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c index 0d6b6663d5f..0aefc5319a0 100644 --- a/arch/mips/sgi-ip32/ip32-irq.c +++ b/arch/mips/sgi-ip32/ip32-irq.c @@ -325,16 +325,11 @@ static void mask_and_ack_maceisa_irq(unsigned int irq) { unsigned long mace_int; - switch (irq) { - case MACEISA_PARALLEL_IRQ: - case MACEISA_SERIAL1_TDMAPR_IRQ: - case MACEISA_SERIAL2_TDMAPR_IRQ: - /* edge triggered */ - mace_int = mace->perif.ctrl.istat; - mace_int &= ~(1 << (irq - MACEISA_AUDIO_SW_IRQ)); - mace->perif.ctrl.istat = mace_int; - break; - } + /* edge triggered */ + mace_int = mace->perif.ctrl.istat; + mace_int &= ~(1 << (irq - MACEISA_AUDIO_SW_IRQ)); + mace->perif.ctrl.istat = mace_int; + disable_maceisa_irq(irq); } @@ -344,7 +339,16 @@ static void end_maceisa_irq(unsigned irq) enable_maceisa_irq(irq); } -static struct irq_chip ip32_maceisa_interrupt = { +static struct irq_chip ip32_maceisa_level_interrupt = { + .name = "IP32 MACE ISA", + .ack = disable_maceisa_irq, + .mask = disable_maceisa_irq, + .mask_ack = disable_maceisa_irq, + .unmask = enable_maceisa_irq, + .end = end_maceisa_irq, +}; + +static struct irq_chip ip32_maceisa_edge_interrupt = { .name = "IP32 MACE ISA", .ack = mask_and_ack_maceisa_irq, .mask = disable_maceisa_irq, @@ -500,27 +504,50 @@ void __init arch_init_irq(void) for (irq = CRIME_IRQ_BASE; irq <= IP32_IRQ_MAX; irq++) { switch (irq) { case MACE_VID_IN1_IRQ ... MACE_PCI_BRIDGE_IRQ: - set_irq_chip(irq, &ip32_mace_interrupt); + set_irq_chip_and_handler_name(irq,&ip32_mace_interrupt, + handle_level_irq, "level"); break; + case MACEPCI_SCSI0_IRQ ... MACEPCI_SHARED2_IRQ: - set_irq_chip(irq, &ip32_macepci_interrupt); + set_irq_chip_and_handler_name(irq, + &ip32_macepci_interrupt, handle_level_irq, + "level"); break; + case CRIME_GBE0_IRQ ... CRIME_GBE3_IRQ: - set_irq_chip(irq, &crime_edge_interrupt); + set_irq_chip_and_handler_name(irq, + &crime_edge_interrupt, handle_edge_irq, "edge"); break; case CRIME_CPUERR_IRQ: case CRIME_MEMERR_IRQ: - set_irq_chip(irq, &crime_level_interrupt); + set_irq_chip_and_handler_name(irq, + &crime_level_interrupt, handle_level_irq, + "level"); break; + case CRIME_RE_EMPTY_E_IRQ ... CRIME_RE_IDLE_E_IRQ: case CRIME_SOFT0_IRQ ... CRIME_SOFT2_IRQ: - set_irq_chip(irq, &crime_edge_interrupt); + set_irq_chip_and_handler_name(irq, + &crime_edge_interrupt, handle_edge_irq, "edge"); break; + case CRIME_VICE_IRQ: - set_irq_chip(irq, &crime_edge_interrupt); + set_irq_chip_and_handler_name(irq, + &crime_edge_interrupt, handle_edge_irq, "edge"); + break; + + case MACEISA_PARALLEL_IRQ: + case MACEISA_SERIAL1_TDMAPR_IRQ: + case MACEISA_SERIAL2_TDMAPR_IRQ: + set_irq_chip_and_handler_name(irq, + &ip32_maceisa_edge_interrupt, handle_edge_irq, + "edge"); break; + default: - set_irq_chip(irq, &ip32_maceisa_interrupt); + set_irq_chip_and_handler_name(irq, + &ip32_maceisa_level_interrupt, handle_level_irq, + "level"); break; } } |