diff options
| author | Franck Bui-Huu <fbuihuu@gmail.com> | 2007-10-18 09:11:16 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2008-01-29 10:14:57 +0000 |
| commit | cbdbe07f9d60b80c903bddf6533db839789925c7 (patch) | |
| tree | 4a51eb7c22ef1174dce9d5c09c9b5c256f9a7717 /arch/mips/mm | |
| parent | f49b94d8c111e86e4e04a5a0eb83988d9d935d56 (diff) | |
[MIPS] tlbex.c: use __cacheline_aligned instead of __tlb_handler_align
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mm')
| -rw-r--r-- | arch/mips/mm/tlbex.c | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index 325bc730ab5..21bcf084882 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -1391,18 +1391,15 @@ static void __init build_r4000_tlb_refill_handler(void) extern void tlb_do_page_fault_0(void); extern void tlb_do_page_fault_1(void); -#define __tlb_handler_align \ - __attribute__((__aligned__(1 << CONFIG_MIPS_L1_CACHE_SHIFT))) - /* * 128 instructions for the fastpath handler is generous and should * never be exceeded. */ #define FASTPATH_SIZE 128 -u32 __tlb_handler_align handle_tlbl[FASTPATH_SIZE]; -u32 __tlb_handler_align handle_tlbs[FASTPATH_SIZE]; -u32 __tlb_handler_align handle_tlbm[FASTPATH_SIZE]; +u32 handle_tlbl[FASTPATH_SIZE] __cacheline_aligned; +u32 handle_tlbs[FASTPATH_SIZE] __cacheline_aligned; +u32 handle_tlbm[FASTPATH_SIZE] __cacheline_aligned; static void __init iPTE_LW(u32 **p, struct label **l, unsigned int pte, unsigned int ptr) |