diff options
| author | Len Brown <len.brown@intel.com> | 2006-01-27 17:18:29 -0500 |
|---|---|---|
| committer | Len Brown <len.brown@intel.com> | 2006-01-27 17:18:29 -0500 |
| commit | 292dd876ee765c478b27c93cc51e93a558ed58bf (patch) | |
| tree | 5b740e93253295baee2a9c414a6c66d03d44a9ef /arch/mips/mm/c-r4k.c | |
| parent | d4ec6c7cc9a15a7a529719bc3b84f46812f9842e (diff) | |
| parent | 9fdb62af92c741addbea15545f214a6e89460865 (diff) | |
Pull release into acpica branch
Diffstat (limited to 'arch/mips/mm/c-r4k.c')
| -rw-r--r-- | arch/mips/mm/c-r4k.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 38223b44d96..422b55fab07 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -1183,8 +1183,8 @@ static void __init setup_scache(void) if (!sc_present) return; - if ((c->isa_level == MIPS_CPU_ISA_M32 || - c->isa_level == MIPS_CPU_ISA_M64) && + if ((c->isa_level == MIPS_CPU_ISA_M32R1 || + c->isa_level == MIPS_CPU_ISA_M64R1) && !(c->scache.flags & MIPS_CACHE_NOT_PRESENT)) panic("Dunno how to handle MIPS32 / MIPS64 second level cache"); |