diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2006-10-31 18:33:09 +0000 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2006-10-31 20:13:22 +0000 |
commit | 70e46f48cb5933119712ee27945309a4bfc98282 (patch) | |
tree | c9a35ca3652659562e8bc534ca2caf563d9ccd88 /arch/mips/mips-boards/generic/time.c | |
parent | e79f55a8c7aaae5a33e8c2b29682ec8e603b5434 (diff) |
[MIPS] VSMP: Synchronize cp0 counters on bootup.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mips-boards/generic/time.c')
-rw-r--r-- | arch/mips/mips-boards/generic/time.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c index 65970670500..d817c60c5ca 100644 --- a/arch/mips/mips-boards/generic/time.c +++ b/arch/mips/mips-boards/generic/time.c @@ -209,6 +209,7 @@ static unsigned int __init estimate_cpu_frequency(void) #endif #if defined(CONFIG_MIPS_ATLAS) || defined(CONFIG_MIPS_MALTA) unsigned long flags; + unsigned int start; local_irq_save(flags); @@ -217,13 +218,13 @@ static unsigned int __init estimate_cpu_frequency(void) while (!(CMOS_READ(RTC_REG_A) & RTC_UIP)); /* Start r4k counter. */ - write_c0_count(0); + start = read_c0_count(); /* Read counter exactly on falling edge of update flag */ while (CMOS_READ(RTC_REG_A) & RTC_UIP); while (!(CMOS_READ(RTC_REG_A) & RTC_UIP)); - count = read_c0_count(); + count = read_c0_count() - start; /* restore interrupts */ local_irq_restore(flags); |