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authorLinus Torvalds <torvalds@g5.osdl.org>2006-04-18 19:49:42 -0700
committerLinus Torvalds <torvalds@g5.osdl.org>2006-04-18 19:49:42 -0700
commit038e5e2bf2819058fb1b4b52b583bef9ad063356 (patch)
tree3a152b455f845a25d0958af5b461b034c2d565fa /arch/mips/dec
parent5c723d26fa223bdb17b9230c77e4e1156884475a (diff)
parentd34cb28a3718a7055ed14e2ec058fe3e4574af63 (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (47 commits) [MAINTAINERS] The ham radio code now has website at http://www.linux-ax25.org. [MIPS] Use __ffs() instead of ffs() for waybit calculation. [MIPS] Fix Makefile bugs for MIPS32/MIPS64 R1 and R2. [MIPS] Handle IDE PIO cache aliases on SMP. [MIPS] Make mips_srs_init static. [MIPS] MIPS boards: Set HZ to 100. [MIPS] kgdb: Let gcc compute the array size itself. [MIPS] FPU affinity for MT ASE. [MIPS] MT: Improved multithreading support. [MIPS] kpsd and other AP/SP improvements. [MIPS] R2: Instruction hazard barrier. [MIPS] Fix genrtc compilation. [MIPS] R2: Implement shadow register allocation without spinlock. [MIPS] Fix VR41xx build errors. [MIPS] Fix tx49_blast_icache32_page_indexed. [MIPS] Enable SCHED_NO_NO_OMIT_FRAME_POINTER for MIPS. [MIPS] Use "R" constraint for cache_op. [MIPS] Rewrite all the assembler interrupt handlers to C. [MIPS] Fix the crime against humanity that mipsIRQ.S is. [MIPS] Fixup damage done by 22a9835c350782a5c3257343713932af3ac92ee0. ...
Diffstat (limited to 'arch/mips/dec')
-rw-r--r--arch/mips/dec/boot/decstation.c3
-rw-r--r--arch/mips/dec/int-handler.S14
-rw-r--r--arch/mips/dec/setup.c3
3 files changed, 8 insertions, 12 deletions
diff --git a/arch/mips/dec/boot/decstation.c b/arch/mips/dec/boot/decstation.c
index 56fd4277555..4db8bacaf22 100644
--- a/arch/mips/dec/boot/decstation.c
+++ b/arch/mips/dec/boot/decstation.c
@@ -1,6 +1,7 @@
/*
* arch/mips/dec/decstation.c
*/
+#include <asm/sections.h>
#define RELOC
#define INITRD
@@ -24,7 +25,7 @@
#define INITRD_START (*(unsigned long *) (PARAM+0x218))
#define INITRD_SIZE (*(unsigned long *) (PARAM+0x21c))
-extern int _ftext, _end; /* begin and end of kernel image */
+extern int _ftext; /* begin and end of kernel image */
extern void kernel_entry(int, char **, unsigned long, int *);
void * memcpy(void * dest, const void *src, unsigned int count)
diff --git a/arch/mips/dec/int-handler.S b/arch/mips/dec/int-handler.S
index 41fa372007b..e8ec93e33fe 100644
--- a/arch/mips/dec/int-handler.S
+++ b/arch/mips/dec/int-handler.S
@@ -36,7 +36,7 @@
.text
.set noreorder
/*
- * decstation_handle_int: Interrupt handler for DECstations
+ * plat_irq_dispatch: Interrupt handler for DECstations
*
* We follow the model in the Indy interrupt code by David Miller, where he
* says: a lot of complication here is taken away because:
@@ -125,11 +125,7 @@
* just take another exception, big deal.
*/
.align 5
- NESTED(decstation_handle_int, PT_SIZE, ra)
- .set noat
- SAVE_ALL
- CLI # TEST: interrupts should be off
- .set at
+ NESTED(plat_irq_dispatch, PT_SIZE, ra)
.set noreorder
/*
@@ -282,9 +278,11 @@ fpu:
#endif
spurious:
- j spurious_interrupt
+ jal spurious_interrupt
nop
- END(decstation_handle_int)
+ j ret_from_irq
+ nop
+ END(plat_irq_dispatch)
/*
* Generic unimplemented interrupt routines -- cpu_mask_nr_tbl
diff --git a/arch/mips/dec/setup.c b/arch/mips/dec/setup.c
index 7c1ca8f6330..ad5d436d80c 100644
--- a/arch/mips/dec/setup.c
+++ b/arch/mips/dec/setup.c
@@ -48,8 +48,6 @@ extern void dec_machine_halt(void);
extern void dec_machine_power_off(void);
extern irqreturn_t dec_intr_halt(int irq, void *dev_id, struct pt_regs *regs);
-extern asmlinkage void decstation_handle_int(void);
-
unsigned long dec_kn_slot_base, dec_kn_slot_size;
EXPORT_SYMBOL(dec_kn_slot_base);
@@ -744,7 +742,6 @@ void __init arch_init_irq(void)
panic("Don't know how to set this up!");
break;
}
- set_except_vector(0, decstation_handle_int);
/* Free the FPU interrupt if the exception is present. */
if (!cpu_has_nofpuex) {