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authorPavel Pisa <ppisa@pikron.com>2007-03-07 23:52:40 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-03-12 16:49:34 +0000
commit83b84c4e8c7cf00e26610f03ee59e9be010f527c (patch)
tree9a7763688a632c8909071b293173800689b7d295 /arch/mips/dec/ioasic-irq.c
parenta45570ebf36c5408ce6cbfd3acd39edf1ada5cda (diff)
[ARM] 4254/1: i.MX/MX1 CPU Frequency scaling honor boot loader set BCLK_DIV.
The minimal bus clock prescaler should be kept at value selected by the board / boot loader designer. Switching frequency above startup limit could lead to the external memory/devices misbehave. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/mips/dec/ioasic-irq.c')
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