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authorManuel Lauss <manuel.lauss@googlemail.com>2010-02-24 17:40:21 +0100
committerRalf Baechle <ralf@linux-mips.org>2010-02-27 12:53:43 +0100
commit11b897cf84c37e6522db914793677e933ef311fb (patch)
treeb9d69cea86b2c1673f30332ff9b3944dc00bfc9b /arch/mips/alchemy/devboards/db1200/platform.c
parentb9b37787d24cca9fbd63f767663e9439fa69aa22 (diff)
MIPS: Alchemy: use 36bit addresses for PCMCIA resources.
On Alchemy the PCMCIA area lies at the end of the chips 36bit system bus area. Currently, addresses at the far end of the 32bit area are assumed to belong to the PCMCIA area and fixed up to the real 36bit address before being passed to ioremap(). A previous commit enabled 64 bit physical size for the resource datatype on Alchemy and this allows to use the correct 36bit addresses when registering the PCMCIA sockets. This patch removes the 32-to-36bit address fixup and registers the Alchemy demo board pcmcia socket with the correct 36bit physical addresses. Tested on DB1200, with a CF card (ide-cs driver) and a 3c589 PCMCIA ethernet card. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Manuel Lauss <manuel.lauss@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/994/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/alchemy/devboards/db1200/platform.c')
-rw-r--r--arch/mips/alchemy/devboards/db1200/platform.c24
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/mips/alchemy/devboards/db1200/platform.c b/arch/mips/alchemy/devboards/db1200/platform.c
index d6b3e64376c..3cb95a98ab3 100644
--- a/arch/mips/alchemy/devboards/db1200/platform.c
+++ b/arch/mips/alchemy/devboards/db1200/platform.c
@@ -507,24 +507,24 @@ static int __init db1200_dev_init(void)
(void __iomem *)KSEG1ADDR(PSC1_PHYS_ADDR) + PSC_SEL_OFFSET);
wmb();
- db1x_register_pcmcia_socket(PCMCIA_ATTR_PSEUDO_PHYS,
- PCMCIA_ATTR_PSEUDO_PHYS + 0x00040000 - 1,
- PCMCIA_MEM_PSEUDO_PHYS,
- PCMCIA_MEM_PSEUDO_PHYS + 0x00040000 - 1,
- PCMCIA_IO_PSEUDO_PHYS,
- PCMCIA_IO_PSEUDO_PHYS + 0x00001000 - 1,
+ db1x_register_pcmcia_socket(PCMCIA_ATTR_PHYS_ADDR,
+ PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
+ PCMCIA_MEM_PHYS_ADDR,
+ PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1,
+ PCMCIA_IO_PHYS_ADDR,
+ PCMCIA_IO_PHYS_ADDR + 0x000010000 - 1,
DB1200_PC0_INT,
DB1200_PC0_INSERT_INT,
/*DB1200_PC0_STSCHG_INT*/0,
DB1200_PC0_EJECT_INT,
0);
- db1x_register_pcmcia_socket(PCMCIA_ATTR_PSEUDO_PHYS + 0x00400000,
- PCMCIA_ATTR_PSEUDO_PHYS + 0x00440000 - 1,
- PCMCIA_MEM_PSEUDO_PHYS + 0x00400000,
- PCMCIA_MEM_PSEUDO_PHYS + 0x00440000 - 1,
- PCMCIA_IO_PSEUDO_PHYS + 0x00400000,
- PCMCIA_IO_PSEUDO_PHYS + 0x00401000 - 1,
+ db1x_register_pcmcia_socket(PCMCIA_ATTR_PHYS_ADDR + 0x004000000,
+ PCMCIA_ATTR_PHYS_ADDR + 0x004400000 - 1,
+ PCMCIA_MEM_PHYS_ADDR + 0x004000000,
+ PCMCIA_MEM_PHYS_ADDR + 0x004400000 - 1,
+ PCMCIA_IO_PHYS_ADDR + 0x004000000,
+ PCMCIA_IO_PHYS_ADDR + 0x004010000 - 1,
DB1200_PC1_INT,
DB1200_PC1_INSERT_INT,
/*DB1200_PC1_STSCHG_INT*/0,