diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-08-05 08:59:22 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-08-05 08:59:22 -0700 |
commit | bbc4fd12a635492ad9d12bb418124fa2d5f0d734 (patch) | |
tree | fe245d350db180d499a9e9d6dc84bbb308f33dc2 /arch/microblaze/include | |
parent | 673b864fd76a29031aa0b4b08fc80886d527b3b7 (diff) | |
parent | 2d5973cb5ac5d04662f86e19a06a4c52fa4c4ae3 (diff) |
Merge branch 'for-linus' of git://git.monstr.eu/linux-2.6-microblaze
* 'for-linus' of git://git.monstr.eu/linux-2.6-microblaze: (49 commits)
microblaze: Add KGDB support
microblaze: Support brki rX, 0x18 for user application debugging
microblaze: Remove nop after MSRCLR/SET, MTS, MFS instructions
microblaze: Simplify syscall rutine
microblaze: Move PT_MODE saving to delay slot
microblaze: Fix _interrupt function
microblaze: Fix _user_exception function
microblaze: Put together addik instructions
microblaze: Use delay slot in syscall macros
microblaze: Save kernel mode in delay slot
microblaze: Do not mix register saving and mode setting
microblaze: Move SAVE_STATE upward
microblaze: entry.S: Macro optimization
microblaze: Optimize hw exception rutine
microblaze: Implement clear_ums macro and fix SAVE_STATE macro
microblaze: Remove additional setup for kernel_mode
microblaze: Optimize SAVE_STATE macro
microblaze: Remove additional loading
microblaze: Completely remove working with R11 register
microblaze: Do not setup BIP in _debug_exception
...
Diffstat (limited to 'arch/microblaze/include')
-rw-r--r-- | arch/microblaze/include/asm/cacheflush.h | 18 | ||||
-rw-r--r-- | arch/microblaze/include/asm/dma-mapping.h | 6 | ||||
-rw-r--r-- | arch/microblaze/include/asm/elf.h | 2 | ||||
-rw-r--r-- | arch/microblaze/include/asm/exceptions.h | 21 | ||||
-rw-r--r-- | arch/microblaze/include/asm/kgdb.h | 28 | ||||
-rw-r--r-- | arch/microblaze/include/asm/page.h | 12 | ||||
-rw-r--r-- | arch/microblaze/include/asm/pvr.h | 2 | ||||
-rw-r--r-- | arch/microblaze/include/asm/setup.h | 2 | ||||
-rw-r--r-- | arch/microblaze/include/asm/system.h | 1 | ||||
-rw-r--r-- | arch/microblaze/include/asm/uaccess.h | 4 | ||||
-rw-r--r-- | arch/microblaze/include/asm/unwind.h | 29 |
11 files changed, 89 insertions, 36 deletions
diff --git a/arch/microblaze/include/asm/cacheflush.h b/arch/microblaze/include/asm/cacheflush.h index a6edd356cd0..7ebd955460d 100644 --- a/arch/microblaze/include/asm/cacheflush.h +++ b/arch/microblaze/include/asm/cacheflush.h @@ -17,6 +17,7 @@ /* Somebody depends on this; sigh... */ #include <linux/mm.h> +#include <linux/io.h> /* Look at Documentation/cachetlb.txt */ @@ -60,7 +61,6 @@ void microblaze_cache_init(void); #define invalidate_icache() mbc->iin(); #define invalidate_icache_range(start, end) mbc->iinr(start, end); - #define flush_icache_user_range(vma, pg, adr, len) flush_icache(); #define flush_icache_page(vma, pg) do { } while (0) @@ -72,9 +72,15 @@ void microblaze_cache_init(void); #define flush_dcache() mbc->dfl(); #define flush_dcache_range(start, end) mbc->dflr(start, end); -#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0 -/* D-cache aliasing problem can't happen - cache is between MMU and ram */ -#define flush_dcache_page(page) do { } while (0) +#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1 +/* MS: We have to implement it because of rootfs-jffs2 issue on WB */ +#define flush_dcache_page(page) \ +do { \ + unsigned long addr = (unsigned long) page_address(page); /* virtual */ \ + addr = (u32)virt_to_phys((void *)addr); \ + flush_dcache_range((unsigned) (addr), (unsigned) (addr) + PAGE_SIZE); \ +} while (0); + #define flush_dcache_mmap_lock(mapping) do { } while (0) #define flush_dcache_mmap_unlock(mapping) do { } while (0) @@ -97,8 +103,10 @@ void microblaze_cache_init(void); #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ do { \ + u32 addr = virt_to_phys(dst); \ + invalidate_icache_range((unsigned) (addr), (unsigned) (addr) + (len));\ memcpy((dst), (src), (len)); \ - flush_icache_range((unsigned) (dst), (unsigned) (dst) + (len)); \ + flush_dcache_range((unsigned) (addr), (unsigned) (addr) + (len));\ } while (0) #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ diff --git a/arch/microblaze/include/asm/dma-mapping.h b/arch/microblaze/include/asm/dma-mapping.h index 18b3731c850..50738958070 100644 --- a/arch/microblaze/include/asm/dma-mapping.h +++ b/arch/microblaze/include/asm/dma-mapping.h @@ -79,12 +79,6 @@ static inline int dma_supported(struct device *dev, u64 mask) return ops->dma_supported(dev, mask); } -#ifdef CONFIG_PCI -/* We have our own implementation of pci_set_dma_mask() */ -#define HAVE_ARCH_PCI_SET_DMA_MASK - -#endif - static inline int dma_set_mask(struct device *dev, u64 dma_mask) { struct dma_map_ops *ops = get_dma_ops(dev); diff --git a/arch/microblaze/include/asm/elf.h b/arch/microblaze/include/asm/elf.h index 7d4acf2b278..732caf1be74 100644 --- a/arch/microblaze/include/asm/elf.h +++ b/arch/microblaze/include/asm/elf.h @@ -77,7 +77,7 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG]; #define ELF_DATA ELFDATA2MSB #endif -#define ELF_EXEC_PAGESIZE 4096 +#define ELF_EXEC_PAGESIZE PAGE_SIZE #define ELF_CORE_COPY_REGS(_dest, _regs) \ diff --git a/arch/microblaze/include/asm/exceptions.h b/arch/microblaze/include/asm/exceptions.h index 4c7b5d037c8..6479097b802 100644 --- a/arch/microblaze/include/asm/exceptions.h +++ b/arch/microblaze/include/asm/exceptions.h @@ -14,6 +14,11 @@ #define _ASM_MICROBLAZE_EXCEPTIONS_H #ifdef __KERNEL__ + +#ifndef CONFIG_MMU +#define EX_HANDLER_STACK_SIZ (4*19) +#endif + #ifndef __ASSEMBLY__ /* Macros to enable and disable HW exceptions in the MSR */ @@ -64,22 +69,6 @@ asmlinkage void full_exception(struct pt_regs *regs, unsigned int type, void die(const char *str, struct pt_regs *fp, long err); void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr); -#if defined(CONFIG_KGDB) -void (*debugger)(struct pt_regs *regs); -int (*debugger_bpt)(struct pt_regs *regs); -int (*debugger_sstep)(struct pt_regs *regs); -int (*debugger_iabr_match)(struct pt_regs *regs); -int (*debugger_dabr_match)(struct pt_regs *regs); -void (*debugger_fault_handler)(struct pt_regs *regs); -#else -#define debugger(regs) do { } while (0) -#define debugger_bpt(regs) 0 -#define debugger_sstep(regs) 0 -#define debugger_iabr_match(regs) 0 -#define debugger_dabr_match(regs) 0 -#define debugger_fault_handler ((void (*)(struct pt_regs *))0) -#endif - #endif /*__ASSEMBLY__ */ #endif /* __KERNEL__ */ #endif /* _ASM_MICROBLAZE_EXCEPTIONS_H */ diff --git a/arch/microblaze/include/asm/kgdb.h b/arch/microblaze/include/asm/kgdb.h new file mode 100644 index 00000000000..78b17d40b23 --- /dev/null +++ b/arch/microblaze/include/asm/kgdb.h @@ -0,0 +1,28 @@ +#ifdef __KERNEL__ +#ifndef __MICROBLAZE_KGDB_H__ +#define __MICROBLAZE_KGDB_H__ + +#ifndef __ASSEMBLY__ + +#define CACHE_FLUSH_IS_SAFE 1 +#define BUFMAX 2048 + +/* + * 32 32-bit general purpose registers (r0-r31) + * 6 32-bit special registers (pc, msr, ear, esr, fsr, btr) + * 12 32-bit PVR + * 7 32-bit MMU Regs (redr, rpid, rzpr, rtlbx, rtlbsx, rtlblo, rtlbhi) + * ------ + * 57 registers + */ +#define NUMREGBYTES (57 * 4) + +#define BREAK_INSTR_SIZE 4 +static inline void arch_kgdb_breakpoint(void) +{ + __asm__ __volatile__("brki r16, 0x18;"); +} + +#endif /* __ASSEMBLY__ */ +#endif /* __MICROBLAZE_KGDB_H__ */ +#endif /* __KERNEL__ */ diff --git a/arch/microblaze/include/asm/page.h b/arch/microblaze/include/asm/page.h index 464ff32bee3..c12c6dfafd9 100644 --- a/arch/microblaze/include/asm/page.h +++ b/arch/microblaze/include/asm/page.h @@ -23,8 +23,16 @@ #ifdef __KERNEL__ /* PAGE_SHIFT determines the page size */ -#define PAGE_SHIFT (12) -#define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT) +#if defined(CONFIG_MICROBLAZE_32K_PAGES) +#define PAGE_SHIFT 15 +#elif defined(CONFIG_MICROBLAZE_16K_PAGES) +#define PAGE_SHIFT 14 +#elif defined(CONFIG_MICROBLAZE_8K_PAGES) +#define PAGE_SHIFT 13 +#else +#define PAGE_SHIFT 12 +#endif +#define PAGE_SIZE (ASM_CONST(1) << PAGE_SHIFT) #define PAGE_MASK (~(PAGE_SIZE-1)) #define LOAD_OFFSET ASM_CONST((CONFIG_KERNEL_START-CONFIG_KERNEL_BASE_ADDR)) diff --git a/arch/microblaze/include/asm/pvr.h b/arch/microblaze/include/asm/pvr.h index e38abc7714b..9578666e98b 100644 --- a/arch/microblaze/include/asm/pvr.h +++ b/arch/microblaze/include/asm/pvr.h @@ -16,7 +16,7 @@ #define PVR_MSR_BIT 0x400 struct pvr_s { - unsigned pvr[16]; + unsigned pvr[12]; }; /* The following taken from Xilinx's standalone BSP pvr.h */ diff --git a/arch/microblaze/include/asm/setup.h b/arch/microblaze/include/asm/setup.h index 7f31394985e..782b5c89248 100644 --- a/arch/microblaze/include/asm/setup.h +++ b/arch/microblaze/include/asm/setup.h @@ -28,8 +28,6 @@ void disable_early_printk(void); void heartbeat(void); void setup_heartbeat(void); -unsigned long long sched_clock(void); - # ifdef CONFIG_MMU extern void mmu_reset(void); extern void early_console_reg_tlb_alloc(unsigned int addr); diff --git a/arch/microblaze/include/asm/system.h b/arch/microblaze/include/asm/system.h index 81e1f7d5b4c..e6a2284571d 100644 --- a/arch/microblaze/include/asm/system.h +++ b/arch/microblaze/include/asm/system.h @@ -45,7 +45,6 @@ extern struct task_struct *_switch_to(struct thread_info *prev, #define smp_rmb() rmb() #define smp_wmb() wmb() -void show_trace(struct task_struct *task, unsigned long *stack); void __bad_xchg(volatile void *ptr, int size); static inline unsigned long __xchg(unsigned long x, volatile void *ptr, diff --git a/arch/microblaze/include/asm/uaccess.h b/arch/microblaze/include/asm/uaccess.h index 26460d15b33..d840f4a2d3c 100644 --- a/arch/microblaze/include/asm/uaccess.h +++ b/arch/microblaze/include/asm/uaccess.h @@ -359,7 +359,7 @@ extern long __user_bad(void); __copy_tofrom_user((__force void __user *)(to), \ (void __user *)(from), (n)) #define __copy_from_user_inatomic(to, from, n) \ - copy_from_user((to), (from), (n)) + __copy_from_user((to), (from), (n)) static inline long copy_from_user(void *to, const void __user *from, unsigned long n) @@ -373,7 +373,7 @@ static inline long copy_from_user(void *to, #define __copy_to_user(to, from, n) \ __copy_tofrom_user((void __user *)(to), \ (__force const void __user *)(from), (n)) -#define __copy_to_user_inatomic(to, from, n) copy_to_user((to), (from), (n)) +#define __copy_to_user_inatomic(to, from, n) __copy_to_user((to), (from), (n)) static inline long copy_to_user(void __user *to, const void *from, unsigned long n) diff --git a/arch/microblaze/include/asm/unwind.h b/arch/microblaze/include/asm/unwind.h new file mode 100644 index 00000000000..d248b7de4b1 --- /dev/null +++ b/arch/microblaze/include/asm/unwind.h @@ -0,0 +1,29 @@ +/* + * Backtrace support for Microblaze + * + * Copyright (C) 2010 Digital Design Corporation + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#ifndef __MICROBLAZE_UNWIND_H +#define __MICROBLAZE_UNWIND_H + +struct stack_trace; + +struct trap_handler_info { + unsigned long start_addr; + unsigned long end_addr; + const char *trap_name; +}; +extern struct trap_handler_info microblaze_trap_handlers; + +extern const char _hw_exception_handler; +extern const char ex_handler_unhandled; + +void microblaze_unwind(struct task_struct *task, struct stack_trace *trace); + +#endif /* __MICROBLAZE_UNWIND_H */ + |