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authorGreg Ungerer <gerg@uclinux.org>2012-09-18 14:34:04 +1000
committerGreg Ungerer <gerg@uclinux.org>2012-09-27 23:34:02 +1000
commit632306f2454bf46c71d4fb7a499916d942b22a32 (patch)
tree8411ae2122ea8d178595eec7de906cc63217c38e /arch/m68k/platform
parent98d9696b38df7d477be34fccd4abb2aae02987c8 (diff)
m68knommu: clean up Pin Assignment definitions for the 54xx ColdFire CPU
The Pin Assignment register definitions for the ColdFire 54xx CPU family are inconsistently named and defined compared to the other ColdFire part definitions. Rename them with the same prefix as used on other parts, MCFGPIO_PAR_, and make their definitions include the MCF_MBAR periphperal region offset. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/platform')
-rw-r--r--arch/m68k/platform/coldfire/m54xx.c10
-rw-r--r--arch/m68k/platform/coldfire/pci.c4
2 files changed, 6 insertions, 8 deletions
diff --git a/arch/m68k/platform/coldfire/m54xx.c b/arch/m68k/platform/coldfire/m54xx.c
index 2081c6cbb3d..1f7c7fd83e2 100644
--- a/arch/m68k/platform/coldfire/m54xx.c
+++ b/arch/m68k/platform/coldfire/m54xx.c
@@ -30,14 +30,12 @@
static void __init m54xx_uarts_init(void)
{
/* enable io pins */
- __raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD,
- MCF_MBAR + MCF_PAR_PSC(0));
+ __raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD, MCFGPIO_PAR_PSC0);
__raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD | MCF_PAR_PSC_RTS_RTS,
- MCF_MBAR + MCF_PAR_PSC(1));
+ MCFGPIO_PAR_PSC1);
__raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD | MCF_PAR_PSC_RTS_RTS |
- MCF_PAR_PSC_CTS_CTS, MCF_MBAR + MCF_PAR_PSC(2));
- __raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD,
- MCF_MBAR + MCF_PAR_PSC(3));
+ MCF_PAR_PSC_CTS_CTS, MCFGPIO_PAR_PSC2);
+ __raw_writeb(MCF_PAR_PSC_TXD | MCF_PAR_PSC_RXD, MCFGPIO_PAR_PSC3);
}
/***************************************************************************/
diff --git a/arch/m68k/platform/coldfire/pci.c b/arch/m68k/platform/coldfire/pci.c
index 553210d3d4c..8572246db84 100644
--- a/arch/m68k/platform/coldfire/pci.c
+++ b/arch/m68k/platform/coldfire/pci.c
@@ -272,8 +272,8 @@ static int __init mcf_pci_init(void)
PACR_EXTMINTE(0x1f), PACR);
/* Set required multi-function pins for PCI bus use */
- __raw_writew(0x3ff, MCF_PAR_PCIBG);
- __raw_writew(0x3ff, MCF_PAR_PCIBR);
+ __raw_writew(0x3ff, MCFGPIO_PAR_PCIBG);
+ __raw_writew(0x3ff, MCFGPIO_PAR_PCIBR);
/* Set up config space for local host bus controller */
__raw_writel(PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |